Perhaps it might be better if the auto-update added new posts to the bottom, so you scrolled through time chronologically as you went down? You wouldn't lose your place and it'd make a bit more sense to read.
the changes in microarchitecture have gotten less radical lately...i'm not saying we need another netburst, but this isn't all that different from sandy bridge with the exception of the GPU-related aspect and manufacturing process.
... wow, you guys must have been serious about some of these statements :D (seriously, I guess the wifi was probably overloaded and you had to hit "send" repeatedly)
I find this new live blog feature interesting to say the least, but I don't think it fits into your site well. Allow me to elaborate.
Just yesterday I listened to your podcast episode 4, and I think you made a great point (that I believe you've said a ouple of times in the past) about the "cable tv-fication" of tech sites. I find it a little bit surprising that you're doing this live blog simply because you seemed passionate about this idea. Your point was essentially that so many tech websites are becoming more and more about publishing the latest rumors and snippets of information that stream out from various "sources" that get repeated over and over on other sites with no real substance.
I think that this live blog thing is headed in that exact direction: constant snippets of interesting new information, but no analysis and nothing of substance. You're doing your readers a disservice by delivering intel's keynotes to us with one-liners. I have no clue how the haswell being capable of 2x FMA ops per cycle per core will affect me as a user. I'd personally much prefer you post a short pipeline post, as you have in the past about the news summerized on the day of the event, then have a thorough analysis of the presentation be posted later on.
Despite this, I still want to thank you for everything you do for your readers! I still think AT has the highest standards of any tech site and that's why I keep coming back!
This is the bread and butter of anandtech though...The sensationalist tech sites didn't even cover this story because it's beyond the scope of those readers (and writers). But you know what, when the next line of tablets and notebooks and MBAs come out, they are going to reference this every single one of these articles like they always do. I see your point, we don't necessarily need a liveblog on something like this, but if Anandtech is able to get the information out faster, why not?
In fairness, this live blog is coming from a real source: Intel themselves and fits square into the news category and not rumor/speculation.
As for 2x FMA, right now only a small benefit as software would have to be recompiled as it uses some new instructions. Basically it allows for two sets of multiply then add functions to be carried out in parallel. The hardware does allow for things like two independent multiplies or two independent adds to be carried out in parallel now. Previously Sandybridge could perform an independent multiply and an independent add. There will be a bit of a benefit for unmodified code but difficult to quantify as optimized code for Sandybridge would avoid that situation.
Thanks for clarifying a bit on the fused-multiply-add thing. I understood at a basic level what the function is for but I was merely using it as an example rather than actually asking what it meant. It was to help illustrate. My point is that we need analysis of what was said at IDF, not one-liner regurgitation.
And I get that this is Intel we're talking about. I didn't mean to say that the information isn't reputable, just that its spewed back out at us without any effort on the part of AT.
I think most readers would rather wait a day or so to get the same information in a well organized presentable manner.
A correction. It appears that Haswell cannot perform two independent floating point adds simultaneously. It can however perform two independent multiplies as well as two independent FMA.
The inability to perform two independent adds is rather puzzling. It wouldn't surprise me if this is one of the minor changes made when they migrate to 14 nm.
2x FMA (and AVX/AVX2) are for high performance floating point. Think matrix multiplication (and everything that ultimately reduces to matrix multiplication, from eigenvalue problems to PDEs).
If you don't know how you need it, then you probably don't need it. That's OK --- enjoy the rest of the chip. No-one will use aggressively every feature that is on it.
We strongly disagree. There was a lot of substance in what Anand was able to summarize. A lot of new substantive news that I didn't know before.
"2* FMA ops per cycle per core is huge. It, combined with other information means that Haswell will be more than two times as fast as Ivy Bridge for a specific watt TDP.
you DO realize that he's posting this directly from IDF hall, right?
You want him to post realtime analysis? Anand has always posted in depth analysis articles after IDF (He did it for Sandy and Ivy as well), but you need to have some patience for that, perhaps? It's rather unrealistic to expect him to do analysis articles on the fly while attending the conference TBH.
I really like the liveblog thing. Pretty sure there will be a "real" article with all the info summed up later as is tradition. Like everyone else is saying, if it helps the man get the info out faster, then I'm good with it too.
Please make this thing update the page with newer 'posts' at the bottom rather than the top, or at least give us an option to sort posts. Viewing this now it's newest to oldest timestamp which is a very annoying way to read it. I get that while it's actually 'live' you want the newest addition at the top, but the option to sort additions makes it more usable after the event is over too.
The Haswell Modularity slide mentions two and four core chips. Apparently six core isn't worth it? Surely this doesn't include socket 2011(or it's replacement) and server lines?
Six core for the desktop likely isn't worth it as desktop applications rarely scale past 4 threads capable of loading the system. With Hyperthreading, desktop chips can run 8.
Server parts are another story but Intel explicitly avoided discussing server variants. They have yet to launch Ivy Bridge-EP and Ivy Bridge-EX (with the EX getting a new socket). I'd expect 10 and 12 core products for the Ivy Bridge EP and EX respectively. For Haswell EP and EX, I'd guess that the core count will likely be 12 and 16.
This. I hate fan noise in laptops. I want a transformer style tablet with zero motors. All that is left is the fan. I had a Samsung Series 7 Slate for a week and the fan noise was incredibly annoying because with a fan that small it has to spin pretty fast.
Maybe I missed it, but I haven't seen any mention of the support chipset for Haswell. I would like to know if this year's crop of Z77 motherboards are likely to be able to support Haswell chips when they come out next year.
As an iPhone user, I say: Go the to the Haswell session tomorrow if you have to choose. Your insights to the CPU architecture are top-shelf, and I'd love to know your thoughts on Haswell further.
seems like haswell is more of an enhanced version of IVB/SNB rather than the major change that intel claims. that would take redesigning rather than adding features and increased provisioning.
Will the 10 watts TDP Haswell SoCs have: --2 CPU Cores per CPU SoC --2 CPU threads per Core or a total of 4 CPU threads per CPU SoC --8 double precision FMAs and 16 double precision FMAs per thread, or a total of 32 double precision FMAs and 64 double precision FMAs per CPU SoC --At a 1 Gigahertz clock would this mean a theoretical maximum of 32 Gigahertz double precision and 64 Gigahertz single precision excluding embedded graphics per CPU SoC. Or will the 10 watt TDP Haswell SoC not have 16 double precision FMAs and 32 single precision FMAs per cycle per core?
In other words will the ultra low voltage Haswell CPU cores have 32 single precision flops per clock and 16 double precision flops per clock? Or are the ultra-low voltage Haswell CPU cores different from the 35 watt TDP or desktop Haswell CPU cores?
Another question I have is what will be the lowest TDP Haswell CPU skew that has 4 CPU cores, 8 CPU threads. For ivy bridge it is the 35 watt TDP mobile i7.
Too bad Intel doesn't seem to be sharing much about Haswell Xeon parts. :-(
Is this equivalent to the dual-integer design of Bulldozer architecture? I know that earlier hyperthreading is not equivalent but does that put one Haswell core equivalent to one Bulldozer module? Not in terms of speed/power but in terms of resources.
Considering that they've updated the OpenGL version with patches in the past, I wouldn't be surprised if this means Haswell will fully support OpenGL 4.0 at launch, and that they'll be working on a patch to 4.2 or 4.3 around then.
From all the comments and slides, it sounds to me like Intel is of course going for the really low power end of computing, really shooting for tablets and such now more than they have. Most of the presentation emphasized this, and they will be enabling this wider range of applications with one architecture.
In addition, it seemed like they are really shooting for high end computing. Doubling this, 20x that, half terabyte bandwidth. It sounds like they just added a ton of components. It was interesting to hear that they added an extra integer ALU - moving towards AMD's idea slightly there. I'm guess that all won't be happening in their mobile-aimed parts but for people that want to spend the money and cut some serious time of big computations in the high end, they could go for the supposed huge increase in performance. And the performance/watt will be increased here as well as a result of all the changes above.
It sounds like they are expanding at both ends of the spectrum. Makes sense.
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fic2 - Tuesday, September 11, 2012 - link
All the comments and images from 2:09 on are doubled, some even tripled (Firefox 15.01).I would also have to say the auto-update is annoying as hell. Since it keeps moving the part I was reading around and I would have to find it again.
Nice notes though.
fic2 - Tuesday, September 11, 2012 - link
Now it seems to be back to single comments. Strange.Boogaloo - Tuesday, September 11, 2012 - link
Got doubled comments in the latest chrome too, but refreshing fixes it. Comments that came in after refreshing were doubled again though.driscoll42 - Tuesday, September 11, 2012 - link
Perhaps it might be better if the auto-update added new posts to the bottom, so you scrolled through time chronologically as you went down? You wouldn't lose your place and it'd make a bit more sense to read.shiznit - Tuesday, September 11, 2012 - link
what happened to the embedded memory?tipoo - Tuesday, September 11, 2012 - link
That had excited me too, too bad.Samus - Wednesday, September 12, 2012 - link
the changes in microarchitecture have gotten less radical lately...i'm not saying we need another netburst, but this isn't all that different from sandy bridge with the exception of the GPU-related aspect and manufacturing process.MrSpadge - Tuesday, September 11, 2012 - link
... wow, you guys must have been serious about some of these statements :D(seriously, I guess the wifi was probably overloaded and you had to hit "send" repeatedly)
fic2 - Tuesday, September 11, 2012 - link
"Sidenote: it's always hilarious to see how many Intel OEMs and competitors end up in these tech insight sessions"Intel has competitors? Did the conference take place in a time portal moving backwards?
driscoll42 - Tuesday, September 11, 2012 - link
Pretty sure by competitors they meant competitors of Intel OEMs.Mr Perfect - Tuesday, September 11, 2012 - link
AMD and ARM come to mind. You don't have to be winning to be competing.ifrit39 - Tuesday, September 11, 2012 - link
Anand,I find this new live blog feature interesting to say the least, but I don't think it fits into your site well. Allow me to elaborate.
Just yesterday I listened to your podcast episode 4, and I think you made a great point (that I believe you've said a ouple of times in the past) about the "cable tv-fication" of tech sites. I find it a little bit surprising that you're doing this live blog simply because you seemed passionate about this idea. Your point was essentially that so many tech websites are becoming more and more about publishing the latest rumors and snippets of information that stream out from various "sources" that get repeated over and over on other sites with no real substance.
I think that this live blog thing is headed in that exact direction: constant snippets of interesting new information, but no analysis and nothing of substance. You're doing your readers a disservice by delivering intel's keynotes to us with one-liners. I have no clue how the haswell being capable of 2x FMA ops per cycle per core will affect me as a user. I'd personally much prefer you post a short pipeline post, as you have in the past about the news summerized on the day of the event, then have a thorough analysis of the presentation be posted later on.
Despite this, I still want to thank you for everything you do for your readers! I still think AT has the highest standards of any tech site and that's why I keep coming back!
cantcurecancer - Tuesday, September 11, 2012 - link
This is the bread and butter of anandtech though...The sensationalist tech sites didn't even cover this story because it's beyond the scope of those readers (and writers). But you know what, when the next line of tablets and notebooks and MBAs come out, they are going to reference this every single one of these articles like they always do. I see your point, we don't necessarily need a liveblog on something like this, but if Anandtech is able to get the information out faster, why not?Kevin G - Tuesday, September 11, 2012 - link
In fairness, this live blog is coming from a real source: Intel themselves and fits square into the news category and not rumor/speculation.As for 2x FMA, right now only a small benefit as software would have to be recompiled as it uses some new instructions. Basically it allows for two sets of multiply then add functions to be carried out in parallel. The hardware does allow for things like two independent multiplies or two independent adds to be carried out in parallel now. Previously Sandybridge could perform an independent multiply and an independent add. There will be a bit of a benefit for unmodified code but difficult to quantify as optimized code for Sandybridge would avoid that situation.
ifrit39 - Tuesday, September 11, 2012 - link
Thanks for clarifying a bit on the fused-multiply-add thing. I understood at a basic level what the function is for but I was merely using it as an example rather than actually asking what it meant. It was to help illustrate. My point is that we need analysis of what was said at IDF, not one-liner regurgitation.And I get that this is Intel we're talking about. I didn't mean to say that the information isn't reputable, just that its spewed back out at us without any effort on the part of AT.
I think most readers would rather wait a day or so to get the same information in a well organized presentable manner.
Kevin G - Wednesday, September 12, 2012 - link
A correction. It appears that Haswell cannot perform two independent floating point adds simultaneously. It can however perform two independent multiplies as well as two independent FMA.The inability to perform two independent adds is rather puzzling. It wouldn't surprise me if this is one of the minor changes made when they migrate to 14 nm.
name99 - Tuesday, September 11, 2012 - link
2x FMA (and AVX/AVX2) are for high performance floating point. Think matrix multiplication (and everything that ultimately reduces to matrix multiplication, from eigenvalue problems to PDEs).If you don't know how you need it, then you probably don't need it. That's OK --- enjoy the rest of the chip. No-one will use aggressively every feature that is on it.
1008anan - Tuesday, September 11, 2012 - link
ifrit39,We strongly disagree. There was a lot of substance in what Anand was able to summarize. A lot of new substantive news that I didn't know before.
"2* FMA ops per cycle per core is huge. It, combined with other information means that Haswell will be more than two times as fast as Ivy Bridge for a specific watt TDP.
dishayu - Wednesday, September 12, 2012 - link
you DO realize that he's posting this directly from IDF hall, right?You want him to post realtime analysis? Anand has always posted in depth analysis articles after IDF (He did it for Sandy and Ivy as well), but you need to have some patience for that, perhaps? It's rather unrealistic to expect him to do analysis articles on the fly while attending the conference TBH.
JKflipflop98 - Wednesday, September 12, 2012 - link
I really like the liveblog thing. Pretty sure there will be a "real" article with all the info summed up later as is tradition. Like everyone else is saying, if it helps the man get the info out faster, then I'm good with it too.MadMan007 - Tuesday, September 11, 2012 - link
Please make this thing update the page with newer 'posts' at the bottom rather than the top, or at least give us an option to sort posts. Viewing this now it's newest to oldest timestamp which is a very annoying way to read it. I get that while it's actually 'live' you want the newest addition at the top, but the option to sort additions makes it more usable after the event is over too.dwade123 - Tuesday, September 11, 2012 - link
I guess Steve Job's dream of using Intel CPU in iPad will soon come true.Mr Perfect - Tuesday, September 11, 2012 - link
The Haswell Modularity slide mentions two and four core chips. Apparently six core isn't worth it? Surely this doesn't include socket 2011(or it's replacement) and server lines?Kevin G - Wednesday, September 12, 2012 - link
Six core for the desktop likely isn't worth it as desktop applications rarely scale past 4 threads capable of loading the system. With Hyperthreading, desktop chips can run 8.Server parts are another story but Intel explicitly avoided discussing server variants. They have yet to launch Ivy Bridge-EP and Ivy Bridge-EX (with the EX getting a new socket). I'd expect 10 and 12 core products for the Ivy Bridge EP and EX respectively. For Haswell EP and EX, I'd guess that the core count will likely be 12 and 16.
Freddo - Tuesday, September 11, 2012 - link
I hope Haswell is power efficient enough to give us fanless ultrabooks.peterfares - Tuesday, September 11, 2012 - link
This. I hate fan noise in laptops. I want a transformer style tablet with zero motors. All that is left is the fan. I had a Samsung Series 7 Slate for a week and the fan noise was incredibly annoying because with a fan that small it has to spin pretty fast.tiki037 - Tuesday, September 11, 2012 - link
Maybe I missed it, but I haven't seen any mention of the support chipset for Haswell. I would like to know if this year's crop of Z77 motherboards are likely to be able to support Haswell chips when they come out next year.Homeles - Tuesday, September 11, 2012 - link
Haswell is on an entirely new socket. Also, the voltage regulation differences are going to require a new chipset.Pheesh - Tuesday, September 11, 2012 - link
it would be a different socket and chipset, so Z77 would not worksecretmanofagent - Tuesday, September 11, 2012 - link
As an iPhone user, I say: Go the to the Haswell session tomorrow if you have to choose. Your insights to the CPU architecture are top-shelf, and I'd love to know your thoughts on Haswell further.dishayu - Wednesday, September 12, 2012 - link
Besides, if we're honest, we know mostly all that is to know about iPhone 5 anyways. Not so much about Haswell.melgross - Wednesday, September 12, 2012 - link
We don't know much of anything about the SoC. we're seeing rumors about a 32nm A5, 32nm A5x, and now, a 32nm A6.Now that it's 12:45 pm, Wednesday, we'll know shortly.
softdrinkviking - Tuesday, September 11, 2012 - link
seems like haswell is more of an enhanced version of IVB/SNB rather than the major change that intel claims. that would take redesigning rather than adding features and increased provisioning.1008anan - Tuesday, September 11, 2012 - link
Will the 10 watts TDP Haswell SoCs have:--2 CPU Cores per CPU SoC
--2 CPU threads per Core or a total of 4 CPU threads per CPU SoC
--8 double precision FMAs and 16 double precision FMAs per thread, or a total of 32 double precision FMAs and 64 double precision FMAs per CPU SoC
--At a 1 Gigahertz clock would this mean a theoretical maximum of 32 Gigahertz double precision and 64 Gigahertz single precision excluding embedded graphics per CPU SoC.
Or will the 10 watt TDP Haswell SoC not have 16 double precision FMAs and 32 single precision FMAs per cycle per core?
In other words will the ultra low voltage Haswell CPU cores have 32 single precision flops per clock and 16 double precision flops per clock? Or are the ultra-low voltage Haswell CPU cores different from the 35 watt TDP or desktop Haswell CPU cores?
Another question I have is what will be the lowest TDP Haswell CPU skew that has 4 CPU cores, 8 CPU threads. For ivy bridge it is the 35 watt TDP mobile i7.
Too bad Intel doesn't seem to be sharing much about Haswell Xeon parts. :-(
lmcd - Wednesday, September 12, 2012 - link
Is this equivalent to the dual-integer design of Bulldozer architecture? I know that earlier hyperthreading is not equivalent but does that put one Haswell core equivalent to one Bulldozer module? Not in terms of speed/power but in terms of resources.jeroompje - Wednesday, September 12, 2012 - link
How many Intel sata-3 ports will Haswell make available?cheers,
Jerome.
Lucian Armasu - Wednesday, September 12, 2012 - link
Haswell only has support for OpenGL 4.0? Well that's very disappointing.jadedcorliss - Monday, September 17, 2012 - link
Considering that they've updated the OpenGL version with patches in the past, I wouldn't be surprised if this means Haswell will fully support OpenGL 4.0 at launch, and that they'll be working on a patch to 4.2 or 4.3 around then.Cloakstar - Wednesday, September 12, 2012 - link
Post to the bottom of the frame. Reverse the chronology. (Oldest -> Newest)As already stated, if viewing live, the text presently moves as new posts are made.
Also, if viewing after the fact, the present format requires one to scroll to the bottom to start reading.
The only time the present format works is if one happens to catch the blog as it starts.
At the very least, store the blog line by line, so it is easy to reverse order after it is recorded.
Arbie - Wednesday, September 12, 2012 - link
Will it run Crysis?
markiz - Thursday, September 13, 2012 - link
+1And I mean ULV?
I'm not really interested in crysis, but dawn of war 2..
Jup, I'm a layman tech enthusiast.
mikato - Thursday, September 20, 2012 - link
From all the comments and slides, it sounds to me like Intel is of course going for the really low power end of computing, really shooting for tablets and such now more than they have. Most of the presentation emphasized this, and they will be enabling this wider range of applications with one architecture.In addition, it seemed like they are really shooting for high end computing. Doubling this, 20x that, half terabyte bandwidth. It sounds like they just added a ton of components. It was interesting to hear that they added an extra integer ALU - moving towards AMD's idea slightly there. I'm guess that all won't be happening in their mobile-aimed parts but for people that want to spend the money and cut some serious time of big computations in the high end, they could go for the supposed huge increase in performance. And the performance/watt will be increased here as well as a result of all the changes above.
It sounds like they are expanding at both ends of the spectrum. Makes sense.