Supposed to be Cougar Cove/Darkmont. Darkmont is also used at CWF. Not sure how much of an architectural upgrade it will be from Lion Cove/Skymont but 18A itself brings many goodies(RibbonFet/PowerVia).
I hope that for Panther Lake Intel will try to aim for Intel 18A for the compute tile, and TSMC N3E or N3P for the I/O tile, and also use LPDDR6 memory : all that combined in a Lunar Lake SoC like chip (with memory on-package) would finally significantly lower power consumption (they should aim for 5W max TDP) to enable fanless consumer compute devices !!!
For consumer devices, FANLESS design with reasonable performance and good responsiveness, instead of raw performance is likely more enticing !!!
I dont think soc tile will benefit from leading edge node. I expect them to stick to N6 for a while and may be even use Intel 7 in 2-3 years once majority of their chips are made outside that node.
It really depends on what they keep inside the SoC tile. Various accelerators would benefit from a newer node as would various duplicated functionality of the other tiles to enable functionality during sleep states (the Cresmont LPE in Meteor Lake for example). It is a complex balancing act between power consumption, cost and die size.
The current wild card is if Intel will spin off NPU functionality off into is own die or move it to another die in the package in future designs.
On Lunar Lake, the NPU can access 8MB L3 "SOC cache" that is on the die and can be used by other blocks. Moving it off the compute tile will require some compensation for the worse access time, assuming they will still have that kind of cache block in the future.
Fanless with reasonable performance? Currently, it seems people think "reasonable performance" is an i9 at 6Ghz. You can't do that fanless. What you can do, is make applications a bit simpler, with less eyes candy, and in lower level code, so as to lower computational overhead.
Must be a Windows thing. When I replaced my skylake-based iMac with an m2 pro based Mac mini, I didn’t notice too much of a difference in general system and application responsiveness. It’s only when I do computationally intensive things that I see the difference.
But Apple has always prioritized QoS in a way that Microsoft has not. Maybe it’s because Microsoft is more focused on making IT departments happy while Apple is focused on users
Actually, it's the way they get users to move onto the next platform. After all, if a K6 was fast enough, then how would they get you to buy an R9? If 1GB of RAM is enough, how would they sell you 32GB of RAM? Etc...
Granted, there are some computationally intense tasks that really do *need* a more powerful CPU and/or more RAM. But, in general, a lot of things could be done with a lot less computation and memory.
No matter how fast my CPU is, my IT department will install enough bloatware in the background to slow down everything to 486 levels. An actual virus would be better than what they put on.
There is nothing more pointless than holding up a wafer for a public announcement. The CPUs are not in a usable form and there's nothing a human eye or a camera photographing it can capture in terms of useful details. They could just hold up a bit of grid paper and convey exactly as much of significance.
It shows a few things. First to their investors, it is something to say that they are on track with the design and holding to their roadmaps. For Intel who has had some notoriously bad projections in recent years, this is important. The second for the analyst crows is that it gives an estimate on the die sizes being used and possibly some chip layout information. This is how in 2022 let it slip that there was a 34 core monolithic version of Sapphire Rapids that eventually became the main Xeon-W line up 6 months later. The Intel reps literally had a wafer on the show floor that they weren't supposed to let people see yet.
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trivik12 - Tuesday, June 4, 2024 - link
Supposed to be Cougar Cove/Darkmont. Darkmont is also used at CWF. Not sure how much of an architectural upgrade it will be from Lion Cove/Skymont but 18A itself brings many goodies(RibbonFet/PowerVia).Diogene7 - Wednesday, June 5, 2024 - link
I hope that for Panther Lake Intel will try to aim for Intel 18A for the compute tile, and TSMC N3E or N3P for the I/O tile, and also use LPDDR6 memory : all that combined in a Lunar Lake SoC like chip (with memory on-package) would finally significantly lower power consumption (they should aim for 5W max TDP) to enable fanless consumer compute devices !!!For consumer devices, FANLESS design with reasonable performance and good responsiveness, instead of raw performance is likely more enticing !!!
trivik12 - Wednesday, June 5, 2024 - link
I dont think soc tile will benefit from leading edge node. I expect them to stick to N6 for a while and may be even use Intel 7 in 2-3 years once majority of their chips are made outside that node.Kevin G - Wednesday, June 12, 2024 - link
It really depends on what they keep inside the SoC tile. Various accelerators would benefit from a newer node as would various duplicated functionality of the other tiles to enable functionality during sleep states (the Cresmont LPE in Meteor Lake for example). It is a complex balancing act between power consumption, cost and die size.The current wild card is if Intel will spin off NPU functionality off into is own die or move it to another die in the package in future designs.
Eliadbu - Thursday, June 13, 2024 - link
On Lunar Lake, the NPU can access 8MB L3 "SOC cache" that is on the die and can be used by other blocks. Moving it off the compute tile will require some compensation for the worse access time, assuming they will still have that kind of cache block in the future.ballsystemlord - Wednesday, June 5, 2024 - link
Fanless with reasonable performance? Currently, it seems people think "reasonable performance" is an i9 at 6Ghz. You can't do that fanless. What you can do, is make applications a bit simpler, with less eyes candy, and in lower level code, so as to lower computational overhead.GeoffreyA - Thursday, June 6, 2024 - link
Indeed, it seems that no matter how much faster CPUs get, applications and OSes "close the gap" with more overhead.Blastdoor - Monday, June 10, 2024 - link
Must be a Windows thing. When I replaced my skylake-based iMac with an m2 pro based Mac mini, I didn’t notice too much of a difference in general system and application responsiveness. It’s only when I do computationally intensive things that I see the difference.But Apple has always prioritized QoS in a way that Microsoft has not. Maybe it’s because Microsoft is more focused on making IT departments happy while Apple is focused on users
ballsystemlord - Monday, June 10, 2024 - link
Actually, it's the way they get users to move onto the next platform. After all, if a K6 was fast enough, then how would they get you to buy an R9? If 1GB of RAM is enough, how would they sell you 32GB of RAM? Etc...Granted, there are some computationally intense tasks that really do *need* a more powerful CPU and/or more RAM. But, in general, a lot of things could be done with a lot less computation and memory.
AnnonymousCoward - Tuesday, June 11, 2024 - link
No matter how fast my CPU is, my IT department will install enough bloatware in the background to slow down everything to 486 levels. An actual virus would be better than what they put on.PeachNCream - Wednesday, June 5, 2024 - link
There is nothing more pointless than holding up a wafer for a public announcement. The CPUs are not in a usable form and there's nothing a human eye or a camera photographing it can capture in terms of useful details. They could just hold up a bit of grid paper and convey exactly as much of significance.Kevin G - Wednesday, June 12, 2024 - link
It shows a few things. First to their investors, it is something to say that they are on track with the design and holding to their roadmaps. For Intel who has had some notoriously bad projections in recent years, this is important. The second for the analyst crows is that it gives an estimate on the die sizes being used and possibly some chip layout information. This is how in 2022 let it slip that there was a 34 core monolithic version of Sapphire Rapids that eventually became the main Xeon-W line up 6 months later. The Intel reps literally had a wafer on the show floor that they weren't supposed to let people see yet.Roy2002 - Monday, July 1, 2024 - link
Holding a wafer for this kind of announcements is common practice. We will see the product in a few months.