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• evanh - Thursday, April 18, 2024 - link

  It's not very clear if that 10 nm is the width or the pitch. Hopefully it's the pitch, with width presumably around 5 nm.

• NextGen_Gamer - Thursday, April 18, 2024 - link

  So, either TSMC or Samsung? There wouldn't be be anyone else able to procure one of these, right?

• SydneyBlue120d - Thursday, April 18, 2024 - link

  TSMS is not interested "at the moment", same goes for Rapidus, so it is Samsung.

• edzieba - Thursday, April 18, 2024 - link

  Or a second for Intel. ASML did not name Intel as the first recipient, merely 'a customer', so the same could be true of the second shipment.

• ballsystemlord - Thursday, April 18, 2024 - link

  I suspect that SKHynix wouldn't be interested at this time.
  But you seem to have forgotten Micron.

• SydneyBlue120d - Thursday, April 18, 2024 - link

  I think I found the name:
  
  https://research.ibm.com/blog/high-na-euv-lithogra...

• ballsystemlord - Friday, April 19, 2024 - link

  Cool! Now we just need to figure out whether they meant width or pitch.

• anonym - Friday, April 19, 2024 - link

  That should be half pitch. Line to line distance is 20nm.

• evanh - Friday, April 19, 2024 - link

  Hmm, so feature size these days more like 10x the node number.

• evanh - Friday, April 19, 2024 - link

  Err, I guess that's really 5 times. Width is 10 nm for target 2 nm node.

• Altimmons - Saturday, April 20, 2024 - link

  Well the article suggests intel plans to call this density the 14Å (angstrom) node. Or 1.4nm. So even more. But that’s been the case for many years now.

• martinpw - Sunday, April 21, 2024 - link

  It's crazy that they mix true nm and marketing nm in the same sentence. So you get bizarre sounding statements like: "High-NA EUV tools will achieve a resolution of 8 nm, which will be instrumental to build logic chips on technologies beyond 3 nm."

• Altimmons - Saturday, April 20, 2024 - link

  Nice find.