There is nothing stopping Intel/AMD from making higher bandwidth LPDDRX APUs, hence rumors suggest there will be quad channel Arrow Lake-generation APUs.
“Micron says that 24GB HBM3 Gen2 stacks will enable 4096-bit HBM3 memory subsystems with a bandwidth of 4.8 TB/s and 6096-bit HBM3 memory subsystems with a bandwidth of 7.2 TB/s..”
Since they doubled the TSVs I assume they should be able to support up to a 8,192-bit bus eventually, right? Maybe a few hundred bits less to account for bad TSVs in some wafers.
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meacupla - Wednesday, July 26, 2023 - link
oh man, if only all of this HBM wasn't being gobbled up by AI processors.24GB of HBM on a Z1 extreme/7840U would be amazing, if possible.
brucethemoose - Wednesday, July 26, 2023 - link
Even if ig was available, its just not economical, see https://semiengineering.com/hbms-future-necessary-...There is nothing stopping Intel/AMD from making higher bandwidth LPDDRX APUs, hence rumors suggest there will be quad channel Arrow Lake-generation APUs.
nandnandnand - Thursday, July 27, 2023 - link
I've heard about Strix Halo with its doubled memory bus, but not a quad-channel Arrow Lake APU. Got a link for it?Santoval - Wednesday, July 26, 2023 - link
“Micron says that 24GB HBM3 Gen2 stacks will enable 4096-bit HBM3 memory subsystems with a bandwidth of 4.8 TB/s and 6096-bit HBM3 memory subsystems with a bandwidth of 7.2 TB/s..”Since they doubled the TSVs I assume they should be able to support up to a 8,192-bit bus eventually, right? Maybe a few hundred bits less to account for bad TSVs in some wafers.
andychow - Tuesday, August 8, 2023 - link
I don't think so. It means they doubled the die stacks, but the bus width is likely up to the controller.Shmee - Thursday, July 27, 2023 - link
This should go on video cards. Could go great on the next RDNA, along with the chiplet design.parrot1553 - Tuesday, August 1, 2023 - link
the 7900XTX already has over 1TB/s bandwidth, so not really impressive at all.