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Memory
Next-Generation CAMM, MR-DIMM Memory Modules Show Up at Computex
by
Anton Shilov
on 6/2/2023 1:00 PM EST
Posted in
Memory
ADATA
Trade Shows
DRAM
DDR5
LPDDR5
CXL
MCR DIMM
Computex 2023
CAMM
MR DIMM
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4 Comments
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ballsystemlord
- Friday, June 2, 2023 -
link
How does the CAMM module connect to the rest of the system?
I do not see any pins.
Wereweeb
- Friday, June 2, 2023 -
link
They're underneath the chipless part of the module. Essentially, it's like a land grid array.
Storage Review has some more images of Dell's version of CAMM showing the pins:
https://www.storagereview.com/review/dell-camm-dra...
nandnandnand
- Saturday, June 3, 2023 -
link
Maybe CAMM will really take off after the switch to DDR6, with no DDR6 SO-DIMM option to compete with. Even if there are benefits right now.
nonnull
- Sunday, June 11, 2023 -
link
What's the latency of MR DIMMs? Historically that's been the Achilles' Heel of alternative DRAM interfaces.
Ditto, what's the minimum burst length? The moment you go beyond a single cache line you start paying a hefty penalty on random accesses.
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4 Comments
Back to Article
ballsystemlord - Friday, June 2, 2023 - link
How does the CAMM module connect to the rest of the system?I do not see any pins.
Wereweeb - Friday, June 2, 2023 - link
They're underneath the chipless part of the module. Essentially, it's like a land grid array.Storage Review has some more images of Dell's version of CAMM showing the pins: https://www.storagereview.com/review/dell-camm-dra...
nandnandnand - Saturday, June 3, 2023 - link
Maybe CAMM will really take off after the switch to DDR6, with no DDR6 SO-DIMM option to compete with. Even if there are benefits right now.nonnull - Sunday, June 11, 2023 - link
What's the latency of MR DIMMs? Historically that's been the Achilles' Heel of alternative DRAM interfaces.Ditto, what's the minimum burst length? The moment you go beyond a single cache line you start paying a hefty penalty on random accesses.