Interesting results. For DDR4 I found [2DPC 1R = 1DPC 2R] > 1DPC 1R, at same speed/timings. This was handy to use multiple small modules to get the higher performance, than the lottery of ensuring 2R modules since the trend over time is to lower rank at a given capacity. Life is going to be interesting when I decide to go DDR5!
Now please follow up with a laptop test. What speed penalty is there on a 8gb soldered + 8gb sodimm with swapping the 8gb sodimm for a 32gb sodimm? And how does it compare with a model that comes standard with 16gb + 16gb?
i've already upgraded my m16. maybe we both should run the tests and compare. it would be nice if we could try a benchmark that can to test the first 16gb or all ram.
Only 16Gb of ram will be dual channel, the top 24GB will be single channel and half as fast. If it prevents having to swap you'll still see a benefit; but if you need - or think you'll need - more than 16gb of ram at some point during the laptops lifespan you should avoid any models with 8gb soldiered.
... Memory SPD -------------------------------------------------------------------------
DIMM # 1 SMBus address 0x50 Memory type DDR4 Module format UDIMM Module Manufacturer(ID) Corsair (7F7F9E0000000000000000000000) SDRAM Manufacturer (ID) SK Hynix (AD00000000000000000000000000) Size 8192 MBytes Max bandwidth DDR4-2133 (1066 MHz) Part number CMK32GX4M4A2666C16 Nominal Voltage 1.20 Volts EPP no XMP yes, rev. 2.0 AMP no DIMM # 2 SMBus address 0x51 Memory type DDR4 Module format UDIMM Module Manufacturer(ID) Corsair (7F7F9E0000000000000000000000) SDRAM Manufacturer (ID) SK Hynix (AD00000000000000000000000000) Size 8192 MBytes Max bandwidth DDR4-2133 (1066 MHz) Part number CMK32GX4M4A2666C16 Nominal Voltage 1.20 Volts EPP no XMP yes, rev. 2.0 AMP no DIMM # 3 SMBus address 0x52 Memory type DDR4 Module format UDIMM Module Manufacturer(ID) Corsair (7F7F9E0000000000000000000000) SDRAM Manufacturer (ID) SK Hynix (AD00000000000000000000000000) Size 8192 MBytes Max bandwidth DDR4-2133 (1066 MHz) Part number CMK32GX4M4A2666C16 Nominal Voltage 1.20 Volts EPP no XMP yes, rev. 2.0 AMP no DIMM # 4 SMBus address 0x53 Memory type DDR4 Module format UDIMM Module Manufacturer(ID) Corsair (7F7F9E0000000000000000000000) SDRAM Manufacturer (ID) SK Hynix (AD00000000000000000000000000) Size 8192 MBytes Max bandwidth DDR4-2133 (1066 MHz) Part number CMK32GX4M4A2666C16 Nominal Voltage 1.20 Volts EPP no XMP yes, rev. 2.0 AMP no
That's likely why. We're locked to an fixed (older) version of Chrome in order to prevent software updates from breaking the apples-to-apples nature of our testing.
Intel also distinguishes between systems with 1 or 2 DIMM slots routed per channel. The supported timings for the various configurations as listed in the Alder Lake datasheets are:
1DPC (1 DIMM slot routed per channel): DDR5-4800 40-40-40 2N
So it should be noted that all of these tests were conducted with the memory controller in an overclocked condition. And although you state that all tests were performed at default settings as per firmware, you don't specify what frequencies and timings were actually used.
I also find it somewhat frustrating that these kinds of tests always highlight the performance difference between 1DPC and 2DPC configurations without showing the corresponding performance delta for situations where you are memory capacity constrained. Even with the fastest SSDs, the penalty for constant swapping to disk is way worse than running 2DPC.
And 8 GB DDR5 modules using x16 DRAMs are also a thing.
However, the point regarding (physical) memory exhaustion and hitting swap hard is not much of a concern when we are focused on consumer - especially gaming consumer - systems when we are talking using a minimum of 32GB (2x16GB) RAM. This is why all reputable recommendations on gaming systems recommend a 16GB RAM (more is good, but generally unnecessary for a gaming-focused rig, less is not good), to avoid that sort of swapping. And the 32GB minimum RAM benchmark used here is twice that recommendation.
Concerns of RAM exhaustion at 32GB is misplaced when taken in the context of the target audience for this benchmarking.
It is, of course, a concern for more professional workloads or more niche situations, such as someone leaving a bazillion browser windows open, playing back a streaming movie or sports event on the 2nd monitor, citrixed into work, and playing a game at the same time (raises hand). However, as this isn't the focus of this article, not benchmarking those situations is not an unreasonable decision.
If you need those more professional-oriented benchmarks, then await a separate article that may cover that, or perhaps visist a more professional-workload-focused publication.
But what if you left Chrome running with more than say 4 tabs open while you're gaming?
No, I totally get what you're saying, and I'm fine with the gaming focus in general. But I'm sure there are plenty of regular visitors to this site that are more likely to be running a bunch of VMs or some other workload that might be memory bound in ways that differ from gaming scenarios.
A case where you care about this, you're probably a power user, at that point in time it would make sense to also test 64GB/memory exhaustion, as people are not taking old sticks with this, they'd directly buy as much as they need since DDR5.
I can't run my work stack on 32GB RAM, and at home I often enough hit 32GB if I work on a hobby project as I like running my entire stack at once.
I have to admit I don't quite understand the results. I'd expect the disadvantage of 2DPC to be that they may not be able to sustain the same frequencies as 1DPC, but clearly that's not the case here since all kits are in fact running at the same frequency. That being the case, I would expect 1R, 2DPC memory to behave functionally identically to 2R, 1DPC memory, since, at least in my understanding, that's basically the same thing as far as the memory controller is concerned.
What would account for the differences? Were the secondary and/or tertiary timings controlled for?
I've seen passing comments that running 2DPC really messes with signal integrity on current setups but didn't read into it any further. Since DDR5 has SOME built in error handling, even on non-ECC chips, it could be that signal losses are causing transmission retries which slow things down.
Assuming that signal integrity is the issue, I'm wondering if rev2 or next gen DDR5 motherboards will try to improve the DDR5 memory traces to combat this or if it's something that needs to happen on the memory controller side.
Also, even though the clockspeeds and primary timings are listed as being the same, the motherboard may be automatically adjusting some of the tertiary timings behind the scenes when using 2DPC, which can also have a measurable impact.
>Since DDR5 has SOME built in error handling, even on non-ECC chips, it could be that signal losses are causing transmission retries which slow things down. I had that thought as well, but as far as I understand, DDR5's builtin error-handling is limited entirely to what happens on the die. I don't think there are any error-handling mechanisms on the wire that would allow the memory system to detect errors in transfer and retransmit.
As far as I know, there are no error correction techniques (such as forward error correction) used for the transmission paths of DDR ram, apart from ECC, thus there are no automatic retransmissions.
The reason why frequencies or timings will suffer for multiple DIMMs per channel may be as simple as signal runtime.
Electrical signals theoretically travel at the speed of light, but high frequency signals exhibit significant propagation delay, depending on trace design and PCB material. About half the speed of light (~150,000 km/s) is a fair assumption for typical PCB traces with DIMM sockets.
With DDR5-4800, we're talking about clock cycles of 2400 MHz, which translates to 1 cycle per 400 femtoseconds. In 400 femtoseconds, the electrical high-frequency signal can travel 6 centimeters. Thus, with 3 centimeters longer traces between DIMM_A and DIMM_B their signals would be 180°out of phase. Since we're talking DDR, the rising and falling edge of the clock is used to transmit data, which means the signal timings need to be a lot tighter than 180˚, likely below 90˚, which limits the difference to 1.5 cm.
It's not hard to imagine that this is a significant constraint to PCB layout. Traces can be length matched, but with wide parallel channels (64/72 traces), this is very tricky and cannot be done exactly, as it would be for narrower channels (i.e. 4 or 8 traces).
As you might have noticed, I'm a radio guy and don't have the slightest clue about DDR memory, so take this with a grain of salt.
DDR5 actually does support cyclical redundancy check (CRC) for read and write operations.
Depending on the material used for the PCB, the signal speed for microstrips might be slightly better than 1/2 c, maybe closer to 1/1.7 c or 58.5% of the speed of light.
And according to my calculator at least, 1 ÷ 2,400,000,000 = 0.000000000416667 = 416.667 picoseconds for the unit interval.
And not to downplay the issues you point out in designing DDR5 memory systems, but Alder Lake also supports PCI Express Gen5, which involves routing 64 traces operating at 16.0 GHz for an x16 slot. Serial point-to-point using differential signaling, so not the same thing, but still bonkers nonetheless.
Yes, but if your BER is even close to reasonable, the additional latency from retries should be negligible. And it's not like ECC or FEC are exactly free. You want to do whatever you can to keep the error rate within acceptable tolerances before resorting to the additional overhead / complexity of error correction.
2DPC is much harder on the signal integrity; and only gets worse the higher the clock rate is. To the extent that several years ago there was some public speculation that DDR5 might not be able to support 2DPC at all.
Secondary/tertiary timings generally need to be loser in 2DPC mode. The 4 dimm kit almost certainly has them set looser from the factory in XMP. Without using that (or if you combine a pair of 2 dimm kits) I'm not sure if official JDEC timings or the default BIOS behavior adjusts them down automatically or if you end up overclocking your memory trying to hold the tighter values. OTOH in the OCed timing case I'd expect it to either be about as fast as 1DPC or have stability problems (unless you're using high end modules and not taking advantage of the faster XMP settings for some reason).
AFAICT, we don't even know the primary timings here.
It looks like the Crucial 2x 32GB kit was the only one in the test that had any XMP profiles. But we have no idea if the firmware defaults resulted in those being ignored, used, or possibly even used in conjunction with Intel Dynamic Memory Boost Technology. I believe Alder Lake also has System Agent Geyserville (SAGV), which is another mechanism that could potentially dynamically alter memory frequencies.
Gavin's out for the rest of the day. But once he's back in, we'll check and see if we have logs of those figures so that we can publish exactly what they were.
That would be perfect. I suspect that the four DIMM kit was being set to looser tertiaries automatically by the BIOS, and it would be interesting to see a full ZenTimings / ASRock Timing Configurator style readout for each kit arrangement. The gap in tested bandwidth seems far too high to be a result of rank variance, even for DDR5.
The Z690 compatible version of Timing Configurator can be had from the HWBot community page.
I may be wrong but the Grand Theft Auto benchmark titles for 1080p and 4k may need to be reversed as it shows 4k low mode having 80 more fps higher fps 1080p max mode.
"The R in the 1Rx8 stands for rank, so 1Rx8 means it has one rank with eight memory chips per rank. " I thought x8 means each IC correspond to 8 bit of the bus, so 1Rx16 only need 4 ICs to form a 64bit rank.
Please do overclocking. I understand why you don't think it proper to do so but I really want a trusted source to settle the debate between Samsung and Hynix for DDR5 OC. I have a feeling they are actually the same but the OC community has fallen for the idea that Hynix is better.
Also please look into clearing up whether higher XMP kits are just price segmentation tactic for memory vendors to make more money or are actually better binned. I'm sure they are better binned at times but I am also fairly confident they charge more for what is just a kit with an OC and not a better bin. This information could help people save some money.
Getting information of memory IC differences being the biggest indicator of potential memory performance into the mainstream is invaluable. This is important because I see way to many people building $2000+ PCs worrying about CPU OC for up to 5% more performance and not worrying about RAM OC for up to 10% more performance. Mainstream people don't have their priorities straight because mainstream tech influencers don't know better.
The benefit of XMP is that ordinary people don't have to try to do manual RAM overclocking, which is too complicated to be worthwhile for most people — especially on less-expensive boards that simply refuse to post and require guesses and manual CMOS clearing with a screwdriver. If one has the luxury of a fancy board with highly-specific post codes on a display, a CMOS reset button on the back panel (and, optimally, the ability to simply switch to a different profile), and reliable bypass of unstable RAM settings automatically by the board (preventing no-post situations) it might be worth doing for some enthusiasts. I suppose some of the new software configuration programs help to reduce the pain of RAM tinkering. I would rather switch on XMP and that's that, particularly when the RAM vendor promises it will work with the board I'm using at that speed.
With DDR4 there is a difference between a daisy chain layout and a T topology layout, in terms of which layout is optimal with 2 sticks of RAM (daisy) and which is optimal with 4 (T). Does that model continue with DDR5? Which layout does this MSI board use and have you tried the other layout to verify that the board layout is not a factor?
Seems like only a few years ago that even 32 GB was the 'you'll NEVER need that much RAM!' line in the silicon sand, and, I bought it and ...still don't really need it; now it seems 2x 32 GB sticks will be the new norm? :) (Break out the wallet if you need 64 GB of DDR5-6400 for some 'future proofing'! :)
Agreed, 16gb is still plenty for almost all users particularly at home where you won’t be running 23 agents like my work PC (uses ~6gb of Ram at idle!). I went 32 on my current machine because DDR4 was cheap and it was like $100 more but even with lots of multitasking, gaming, encoding I don’t get close to the limits of 16gb let alone 32. Now if I wanted to run some VMs that would be a different story but that’s not what most people do.
Define your use-case, average user will still not hit 8GB nowadays, and 16GB will cover 90-95% of users. Those who need more than that you start talking about people running DB, VM, etc., and there it will constantly be whatever the amount of RAM that is affordable/enough gain at that price point. For me right now it's 64GB, but for someone else that can still be 16GB.
Thank you for this test, I appreciate the work that went into it.
I see a potential limitation in the applicability of this test to a variety of use cases. Choosing to only do the tests with the 12900K drastically limits the effects of memory latency on most of your tests because the 12900K has a significant amount of L3 cache. That large amount of cache will serve to significantly reduce the penalty of the higher latency of various RAM configurations. I would like to see the same tests run with a 12400 or 12100 to see how the much lower cache levels of those processors affects the test results.
Very interesting that none of these DIMMs are half-height, seemingly it's cheaper to use a single full-height PCB even if you only populate half of it.
One thing I didn't see here that would have been instructive is the location of the memory controller--DDR5 in this case--which I gather is in the CPU? There will be differences there, of course, and we'll know a lot more when AMD introduces its PCIe5 CPUs & buses later this year. The memory controller is an integral part of ram performance, of course. It also would have been interesting to do a bit of DDR4 comparisons--not necessarily at the "same" clocks--but for DDR5 clocks versus the fastest XMP clocks (stable clocks) available with DDR 4 at the present time. That is going to be of interest to a lot of people I'm thinking...;)
IMO, a better use of a turn-based-strategy (TBS) game like Civ6 is how long a late game end-of-turn computer AI player turn takes than for FPS.
As long as FPS is acceptable, for a TBS, the most important number is that end-of-turn time. It can take minutes to process the AI players turns. The reduction in that (whether on CPU or RAM benchmarks - GPU is mostly irrelevant) thumb-twiddling time would be much more informative than FPS.
My understanding of the sloth of recent versions of Civ is due the use of such high-level programming language (scripting) that speed is squandered for ease/quickness of development.
How much developers should be rewarded for producing slow but cheap-to-make code is a question.
If recent CIv games were in assembly they would fly. Of course, no developer of large programs does that due to development cost and code portability. However, I bet there are speedier yet not too onerous solutions that would make Civ much less sluggish. The question for the developer is ‘Why bother?’ As long as people continue to buy slower and slower games there is no incentive to make more optimized code.
Samsung is the only DRAM vendor bringing a new fab online this year, the rest will be in Q4 2024. I hope you like expensive DDR5. Price fixing will happen again, they will be convicted again, and the consequences will be nowhere near the profit made. Everything is perfectly normal.
Read through the article but from a user standpoint that just wants to buy it and plug it in I still have no idea whether 1 single channel stick of R2 32GB is or isnt faster than 2 sticks of R1 16GB in dual channel?
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ralritt - Thursday, April 7, 2022 - link
All of the charts are labeled as DDR4-4800.Medikit - Thursday, April 7, 2022 - link
I was going to mention this as well. Guess we are still getting used to saying/writing DDR5.Ryan Smith - Thursday, April 7, 2022 - link
Indeed we are. Thanks for spotting that one!flashmozzg - Thursday, April 7, 2022 - link
Same with test setup.porina - Thursday, April 7, 2022 - link
Interesting results. For DDR4 I found [2DPC 1R = 1DPC 2R] > 1DPC 1R, at same speed/timings. This was handy to use multiple small modules to get the higher performance, than the lottery of ensuring 2R modules since the trend over time is to lower rank at a given capacity. Life is going to be interesting when I decide to go DDR5!Gavin Bonshor - Thursday, April 7, 2022 - link
I will change this as soon as I get WiFi on my laptop. Thanks for the spotlschiedel - Thursday, April 7, 2022 - link
Now please follow up with a laptop test. What speed penalty is there on a 8gb soldered + 8gb sodimm with swapping the 8gb sodimm for a 32gb sodimm? And how does it compare with a model that comes standard with 16gb + 16gb?LordRahl72 - Thursday, April 7, 2022 - link
+1 to this. I am thinking of adding a 32GB stick to my Zephyous m16 but wondering if there would be any performance hit or not.lschiedel - Thursday, April 7, 2022 - link
i've already upgraded my m16.maybe we both should run the tests and compare.
it would be nice if we could try a benchmark that can to test the first 16gb or all ram.
deil - Monday, April 11, 2022 - link
+1 as well I am about to get one, so this info would be great.DanNeely - Thursday, April 7, 2022 - link
Only 16Gb of ram will be dual channel, the top 24GB will be single channel and half as fast. If it prevents having to swap you'll still see a benefit; but if you need - or think you'll need - more than 16gb of ram at some point during the laptops lifespan you should avoid any models with 8gb soldiered.Ryan Smith - Thursday, April 7, 2022 - link
We don't have any laptops like that in house right now. But I'll make note of that for once we get a DDR5 laptop in with such a configuration.zforgetaboutit - Thursday, April 7, 2022 - link
Benchmark Speedometer 2.0 - suspicious scores seenWhen I ran it (from your link) 3 times, my overall score was 170+ each time, which is 11% better than your best score. How can this be? Please advise.
my sample run
---------------
Detailed Results
Iteration 1 168.7 runs/min
Iteration 2 152.0 runs/min
Iteration 3 177.1 runs/min
Iteration 4 173.5 runs/min
Iteration 5 173.3 runs/min
Iteration 6 179.7 runs/min
Iteration 7 166.4 runs/min
Iteration 8 163.4 runs/min
Iteration 9 178.6 runs/min
Iteration 10 176.0 runs/min
Arithmetic Mean:171 ± 6.1 (3.6%)
---------------------------------------------------------------------
I have middle-of-the-road 4 x 8GB DDR4-2133 @ ~1440 GHz, running on an Intel i7-6700k, as follows
CPU-Z TXT Report
-------------------------------------------------------------------------
CPU-Z version 1.99.0
...
Memory SPD
-------------------------------------------------------------------------
DIMM # 1
SMBus address 0x50
Memory type DDR4
Module format UDIMM
Module Manufacturer(ID) Corsair (7F7F9E0000000000000000000000)
SDRAM Manufacturer (ID) SK Hynix (AD00000000000000000000000000)
Size 8192 MBytes
Max bandwidth DDR4-2133 (1066 MHz)
Part number CMK32GX4M4A2666C16
Nominal Voltage 1.20 Volts
EPP no
XMP yes, rev. 2.0
AMP no
DIMM # 2
SMBus address 0x51
Memory type DDR4
Module format UDIMM
Module Manufacturer(ID) Corsair (7F7F9E0000000000000000000000)
SDRAM Manufacturer (ID) SK Hynix (AD00000000000000000000000000)
Size 8192 MBytes
Max bandwidth DDR4-2133 (1066 MHz)
Part number CMK32GX4M4A2666C16
Nominal Voltage 1.20 Volts
EPP no
XMP yes, rev. 2.0
AMP no
DIMM # 3
SMBus address 0x52
Memory type DDR4
Module format UDIMM
Module Manufacturer(ID) Corsair (7F7F9E0000000000000000000000)
SDRAM Manufacturer (ID) SK Hynix (AD00000000000000000000000000)
Size 8192 MBytes
Max bandwidth DDR4-2133 (1066 MHz)
Part number CMK32GX4M4A2666C16
Nominal Voltage 1.20 Volts
EPP no
XMP yes, rev. 2.0
AMP no
DIMM # 4
SMBus address 0x53
Memory type DDR4
Module format UDIMM
Module Manufacturer(ID) Corsair (7F7F9E0000000000000000000000)
SDRAM Manufacturer (ID) SK Hynix (AD00000000000000000000000000)
Size 8192 MBytes
Max bandwidth DDR4-2133 (1066 MHz)
Part number CMK32GX4M4A2666C16
Nominal Voltage 1.20 Volts
EPP no
XMP yes, rev. 2.0
AMP no
zforgetaboutit - Thursday, April 7, 2022 - link
I'm running Win10 (latest), Chrome v100.0 .Ryan Smith - Thursday, April 7, 2022 - link
"I'm running [...] Chrome v100.0 ."That's likely why. We're locked to an fixed (older) version of Chrome in order to prevent software updates from breaking the apples-to-apples nature of our testing.
zforgetaboutit - Thursday, April 7, 2022 - link
I see your point.Then there's also a possibility Chrome may have improved by 10% since your version.
DanNeely - Thursday, April 7, 2022 - link
Chrome improving, or getting worse, from one version to the next is Ryan's point.zforgetaboutit - Thursday, April 7, 2022 - link
That's his point that I saw.repoman27 - Thursday, April 7, 2022 - link
Intel also distinguishes between systems with 1 or 2 DIMM slots routed per channel. The supported timings for the various configurations as listed in the Alder Lake datasheets are:1DPC (1 DIMM slot routed per channel):
DDR5-4800 40-40-40 2N
2DPC (2 DIMM slots routed per channel):
1DPC populated = DDR5-4400 40-37-37 2N
2DPC populated 1R/1R = DDR5-4000 36-34-34 2N
2DPC populated 2R/2R = DDR5-3600 (timings not specified)
So it should be noted that all of these tests were conducted with the memory controller in an overclocked condition. And although you state that all tests were performed at default settings as per firmware, you don't specify what frequencies and timings were actually used.
I also find it somewhat frustrating that these kinds of tests always highlight the performance difference between 1DPC and 2DPC configurations without showing the corresponding performance delta for situations where you are memory capacity constrained. Even with the fastest SSDs, the penalty for constant swapping to disk is way worse than running 2DPC.
And 8 GB DDR5 modules using x16 DRAMs are also a thing.
eldakka - Wednesday, April 13, 2022 - link
Mostly Valid points.However, the point regarding (physical) memory exhaustion and hitting swap hard is not much of a concern when we are focused on consumer - especially gaming consumer - systems when we are talking using a minimum of 32GB (2x16GB) RAM. This is why all reputable recommendations on gaming systems recommend a 16GB RAM (more is good, but generally unnecessary for a gaming-focused rig, less is not good), to avoid that sort of swapping. And the 32GB minimum RAM benchmark used here is twice that recommendation.
Concerns of RAM exhaustion at 32GB is misplaced when taken in the context of the target audience for this benchmarking.
It is, of course, a concern for more professional workloads or more niche situations, such as someone leaving a bazillion browser windows open, playing back a streaming movie or sports event on the 2nd monitor, citrixed into work, and playing a game at the same time (raises hand). However, as this isn't the focus of this article, not benchmarking those situations is not an unreasonable decision.
If you need those more professional-oriented benchmarks, then await a separate article that may cover that, or perhaps visist a more professional-workload-focused publication.
repoman27 - Thursday, April 14, 2022 - link
But what if you left Chrome running with more than say 4 tabs open while you're gaming?No, I totally get what you're saying, and I'm fine with the gaming focus in general. But I'm sure there are plenty of regular visitors to this site that are more likely to be running a bunch of VMs or some other workload that might be memory bound in ways that differ from gaming scenarios.
RSAUser - Tuesday, April 19, 2022 - link
A case where you care about this, you're probably a power user, at that point in time it would make sense to also test 64GB/memory exhaustion, as people are not taking old sticks with this, they'd directly buy as much as they need since DDR5.I can't run my work stack on 32GB RAM, and at home I often enough hit 32GB if I work on a hobby project as I like running my entire stack at once.
Jp7188 - Wednesday, April 13, 2022 - link
4x16 (64GB) performed worse in every test vs. 32GB. Thats reasonable assurance mem exhaustion wasn't much of a factor.Dolda2000 - Thursday, April 7, 2022 - link
I have to admit I don't quite understand the results. I'd expect the disadvantage of 2DPC to be that they may not be able to sustain the same frequencies as 1DPC, but clearly that's not the case here since all kits are in fact running at the same frequency. That being the case, I would expect 1R, 2DPC memory to behave functionally identically to 2R, 1DPC memory, since, at least in my understanding, that's basically the same thing as far as the memory controller is concerned.What would account for the differences? Were the secondary and/or tertiary timings controlled for?
MrCommunistGen - Thursday, April 7, 2022 - link
I've seen passing comments that running 2DPC really messes with signal integrity on current setups but didn't read into it any further. Since DDR5 has SOME built in error handling, even on non-ECC chips, it could be that signal losses are causing transmission retries which slow things down.Assuming that signal integrity is the issue, I'm wondering if rev2 or next gen DDR5 motherboards will try to improve the DDR5 memory traces to combat this or if it's something that needs to happen on the memory controller side.
Also, even though the clockspeeds and primary timings are listed as being the same, the motherboard may be automatically adjusting some of the tertiary timings behind the scenes when using 2DPC, which can also have a measurable impact.
Dolda2000 - Thursday, April 7, 2022 - link
>Since DDR5 has SOME built in error handling, even on non-ECC chips, it could be that signal losses are causing transmission retries which slow things down.I had that thought as well, but as far as I understand, DDR5's builtin error-handling is limited entirely to what happens on the die. I don't think there are any error-handling mechanisms on the wire that would allow the memory system to detect errors in transfer and retransmit.
thomasg - Thursday, April 7, 2022 - link
As far as I know, there are no error correction techniques (such as forward error correction) used for the transmission paths of DDR ram, apart from ECC, thus there are no automatic retransmissions.The reason why frequencies or timings will suffer for multiple DIMMs per channel may be as simple as signal runtime.
Electrical signals theoretically travel at the speed of light, but high frequency signals exhibit significant propagation delay, depending on trace design and PCB material. About half the speed of light (~150,000 km/s) is a fair assumption for typical PCB traces with DIMM sockets.
With DDR5-4800, we're talking about clock cycles of 2400 MHz, which translates to 1 cycle per 400 femtoseconds.
In 400 femtoseconds, the electrical high-frequency signal can travel 6 centimeters.
Thus, with 3 centimeters longer traces between DIMM_A and DIMM_B their signals would be 180°out of phase.
Since we're talking DDR, the rising and falling edge of the clock is used to transmit data, which means the signal timings need to be a lot tighter than 180˚, likely below 90˚, which limits the difference to 1.5 cm.
It's not hard to imagine that this is a significant constraint to PCB layout.
Traces can be length matched, but with wide parallel channels (64/72 traces), this is very tricky and cannot be done exactly, as it would be for narrower channels (i.e. 4 or 8 traces).
As you might have noticed, I'm a radio guy and don't have the slightest clue about DDR memory, so take this with a grain of salt.
repoman27 - Friday, April 8, 2022 - link
Just to add a few grains of salt...DDR5 actually does support cyclical redundancy check (CRC) for read and write operations.
Depending on the material used for the PCB, the signal speed for microstrips might be slightly better than 1/2 c, maybe closer to 1/1.7 c or 58.5% of the speed of light.
And according to my calculator at least, 1 ÷ 2,400,000,000 = 0.000000000416667 = 416.667 picoseconds for the unit interval.
And not to downplay the issues you point out in designing DDR5 memory systems, but Alder Lake also supports PCI Express Gen5, which involves routing 64 traces operating at 16.0 GHz for an x16 slot. Serial point-to-point using differential signaling, so not the same thing, but still bonkers nonetheless.
Jp7188 - Wednesday, April 13, 2022 - link
Correct me if I'm wrong, but crc without fec = chance of retransmission = increased latency?repoman27 - Thursday, April 14, 2022 - link
Yes, but if your BER is even close to reasonable, the additional latency from retries should be negligible. And it's not like ECC or FEC are exactly free. You want to do whatever you can to keep the error rate within acceptable tolerances before resorting to the additional overhead / complexity of error correction.DanNeely - Friday, April 8, 2022 - link
2DPC is much harder on the signal integrity; and only gets worse the higher the clock rate is. To the extent that several years ago there was some public speculation that DDR5 might not be able to support 2DPC at all.DanNeely - Thursday, April 7, 2022 - link
Secondary/tertiary timings generally need to be loser in 2DPC mode. The 4 dimm kit almost certainly has them set looser from the factory in XMP. Without using that (or if you combine a pair of 2 dimm kits) I'm not sure if official JDEC timings or the default BIOS behavior adjusts them down automatically or if you end up overclocking your memory trying to hold the tighter values. OTOH in the OCed timing case I'd expect it to either be about as fast as 1DPC or have stability problems (unless you're using high end modules and not taking advantage of the faster XMP settings for some reason).repoman27 - Friday, April 8, 2022 - link
AFAICT, we don't even know the primary timings here.It looks like the Crucial 2x 32GB kit was the only one in the test that had any XMP profiles. But we have no idea if the firmware defaults resulted in those being ignored, used, or possibly even used in conjunction with Intel Dynamic Memory Boost Technology. I believe Alder Lake also has System Agent Geyserville (SAGV), which is another mechanism that could potentially dynamically alter memory frequencies.
Ryan Smith - Thursday, April 7, 2022 - link
Gavin's out for the rest of the day. But once he's back in, we'll check and see if we have logs of those figures so that we can publish exactly what they were.Slash3 - Thursday, April 7, 2022 - link
That would be perfect. I suspect that the four DIMM kit was being set to looser tertiaries automatically by the BIOS, and it would be interesting to see a full ZenTimings / ASRock Timing Configurator style readout for each kit arrangement. The gap in tested bandwidth seems far too high to be a result of rank variance, even for DDR5.The Z690 compatible version of Timing Configurator can be had from the HWBot community page.
https://community.hwbot.org/topic/209738-z690-bios...
alphasquadron - Thursday, April 7, 2022 - link
I may be wrong but the Grand Theft Auto benchmark titles for 1080p and 4k may need to be reversed as it shows 4k low mode having 80 more fps higher fps 1080p max mode.tomli747 - Thursday, April 7, 2022 - link
"The R in the 1Rx8 stands for rank, so 1Rx8 means it has one rank with eight memory chips per rank. "I thought x8 means each IC correspond to 8 bit of the bus, so 1Rx16 only need 4 ICs to form a 64bit rank.
stickdisk - Thursday, April 7, 2022 - link
Please do overclocking. I understand why you don't think it proper to do so but I really want a trusted source to settle the debate between Samsung and Hynix for DDR5 OC. I have a feeling they are actually the same but the OC community has fallen for the idea that Hynix is better.Also please look into clearing up whether higher XMP kits are just price segmentation tactic for memory vendors to make more money or are actually better binned. I'm sure they are better binned at times but I am also fairly confident they charge more for what is just a kit with an OC and not a better bin. This information could help people save some money.
Getting information of memory IC differences being the biggest indicator of potential memory performance into the mainstream is invaluable. This is important because I see way to many people building $2000+ PCs worrying about CPU OC for up to 5% more performance and not worrying about RAM OC for up to 10% more performance. Mainstream people don't have their priorities straight because mainstream tech influencers don't know better.
Oxford Guy - Thursday, April 7, 2022 - link
The benefit of XMP is that ordinary people don't have to try to do manual RAM overclocking, which is too complicated to be worthwhile for most people — especially on less-expensive boards that simply refuse to post and require guesses and manual CMOS clearing with a screwdriver. If one has the luxury of a fancy board with highly-specific post codes on a display, a CMOS reset button on the back panel (and, optimally, the ability to simply switch to a different profile), and reliable bypass of unstable RAM settings automatically by the board (preventing no-post situations) it might be worth doing for some enthusiasts. I suppose some of the new software configuration programs help to reduce the pain of RAM tinkering. I would rather switch on XMP and that's that, particularly when the RAM vendor promises it will work with the board I'm using at that speed.Oxford Guy - Thursday, April 7, 2022 - link
With DDR4 there is a difference between a daisy chain layout and a T topology layout, in terms of which layout is optimal with 2 sticks of RAM (daisy) and which is optimal with 4 (T). Does that model continue with DDR5? Which layout does this MSI board use and have you tried the other layout to verify that the board layout is not a factor?Oxford Guy - Thursday, April 14, 2022 - link
Anyone?WhatYaWant - Friday, April 8, 2022 - link
How would 1x32 compare to 2x16?MDD1963 - Friday, April 8, 2022 - link
Seems like only a few years ago that even 32 GB was the 'you'll NEVER need that much RAM!' line in the silicon sand, and, I bought it and ...still don't really need it; now it seems 2x 32 GB sticks will be the new norm? :) (Break out the wallet if you need 64 GB of DDR5-6400 for some 'future proofing'! :)Leeea - Friday, April 8, 2022 - link
Interesting you say that, because it seems like 16 GB is still enough.The only advantage seems windows ram caching, which is nice, but not all that noticeable with NVMe SSDs.
Icehawk - Sunday, April 10, 2022 - link
Agreed, 16gb is still plenty for almost all users particularly at home where you won’t be running 23 agents like my work PC (uses ~6gb of Ram at idle!). I went 32 on my current machine because DDR4 was cheap and it was like $100 more but even with lots of multitasking, gaming, encoding I don’t get close to the limits of 16gb let alone 32. Now if I wanted to run some VMs that would be a different story but that’s not what most people do.RSAUser - Tuesday, April 19, 2022 - link
Define your use-case, average user will still not hit 8GB nowadays, and 16GB will cover 90-95% of users. Those who need more than that you start talking about people running DB, VM, etc., and there it will constantly be whatever the amount of RAM that is affordable/enough gain at that price point. For me right now it's 64GB, but for someone else that can still be 16GB.lightningz71 - Friday, April 8, 2022 - link
Thank you for this test, I appreciate the work that went into it.I see a potential limitation in the applicability of this test to a variety of use cases. Choosing to only do the tests with the 12900K drastically limits the effects of memory latency on most of your tests because the 12900K has a significant amount of L3 cache. That large amount of cache will serve to significantly reduce the penalty of the higher latency of various RAM configurations. I would like to see the same tests run with a 12400 or 12100 to see how the much lower cache levels of those processors affects the test results.
The_Assimilator - Friday, April 8, 2022 - link
Very interesting that none of these DIMMs are half-height, seemingly it's cheaper to use a single full-height PCB even if you only populate half of it.Hamm Burger - Saturday, April 9, 2022 - link
Belatedly … I think those throughput rates from AIDA should be in GB/s, not MB/s.IBM760XL - Saturday, April 9, 2022 - link
I believe they are correct; 74 thousand MBps = 74 GBps, which sounds reasonable; 74 TBps would be excessive.(Although it would look incorrect if viewed from a country that uses the , as the decimal separator, rather than the thousands separator)
Oxford Guy - Saturday, April 9, 2022 - link
Going on four decades since the Apple Lisa and still no standard ECC on the desktop.WaltC - Saturday, April 9, 2022 - link
One thing I didn't see here that would have been instructive is the location of the memory controller--DDR5 in this case--which I gather is in the CPU? There will be differences there, of course, and we'll know a lot more when AMD introduces its PCIe5 CPUs & buses later this year. The memory controller is an integral part of ram performance, of course. It also would have been interesting to do a bit of DDR4 comparisons--not necessarily at the "same" clocks--but for DDR5 clocks versus the fastest XMP clocks (stable clocks) available with DDR 4 at the present time. That is going to be of interest to a lot of people I'm thinking...;)The_Assimilator - Sunday, April 10, 2022 - link
What pressing problem with desktop DRAM exists that would be instantly solved by adding ECC and thus further increasing cost and complexity?Oxford Guy - Monday, April 11, 2022 - link
Instantly? It was solved almost 40 years ago.Adramtech - Sunday, April 10, 2022 - link
Micron doesn't get enough credit for their current DRAM and NAND lineupeldakka - Wednesday, April 13, 2022 - link
IMO, a better use of a turn-based-strategy (TBS) game like Civ6 is how long a late game end-of-turn computer AI player turn takes than for FPS.As long as FPS is acceptable, for a TBS, the most important number is that end-of-turn time. It can take minutes to process the AI players turns. The reduction in that (whether on CPU or RAM benchmarks - GPU is mostly irrelevant) thumb-twiddling time would be much more informative than FPS.
Oxford Guy - Thursday, April 14, 2022 - link
My understanding of the sloth of recent versions of Civ is due the use of such high-level programming language (scripting) that speed is squandered for ease/quickness of development.How much developers should be rewarded for producing slow but cheap-to-make code is a question.
If recent CIv games were in assembly they would fly. Of course, no developer of large programs does that due to development cost and code portability. However, I bet there are speedier yet not too onerous solutions that would make Civ much less sluggish. The question for the developer is ‘Why bother?’ As long as people continue to buy slower and slower games there is no incentive to make more optimized code.
dicobalt - Thursday, April 14, 2022 - link
Samsung is the only DRAM vendor bringing a new fab online this year, the rest will be in Q4 2024. I hope you like expensive DDR5. Price fixing will happen again, they will be convicted again, and the consequences will be nowhere near the profit made. Everything is perfectly normal.Adramtech - Friday, April 15, 2022 - link
the last price fixing charges were dropped recently for lack of evidence.Oxford Guy - Saturday, April 16, 2022 - link
The fix for the fix.Adramtech - Monday, April 18, 2022 - link
yeah the 3 DRAM companies control the courts too.Oxford Guy - Thursday, April 21, 2022 - link
Courts are often sensitive to various pressures.MadAd - Monday, April 18, 2022 - link
Read through the article but from a user standpoint that just wants to buy it and plug it in I still have no idea whether 1 single channel stick of R2 32GB is or isnt faster than 2 sticks of R1 16GB in dual channel?playhind - Saturday, April 23, 2022 - link
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