Seems a common pattern that early iterations of a process node scale poorly in frequency and current density and even yield. Thus why Intel 10nm started off in laptops and server chips, only showing up a year later in desktops. Wouldn't imagine the first N3 part to be a desktop CPU unless it's made super-wide or slow. Just makes more sense for that to be a mobile or limited-volume server part.
That example for Intel doesn't hold true. Usually what you will see especially TSMC they will make a new node for lower power. So the current 5nm that Apple chips are made on are the low power / high density process. Then about a year later they tweak the process for high power chips by making various tweaks. The 5nm node from TSMC should be tweaked out heavily for AMD by the time mass production starts.
Yield is pretty inherent. Yield always goes up as the process matures, or really the defect density goes down. This means smaller chips are always easier to manufacture earlier as a defect will at worst case make a smaller part of the wafer unusable.
Frequency isn't as straight forward AFAIK. Probably the simplest way to think about it is that a given process has a target max frequency. Say 2ghz for a low power process or 3ghz for a Mobile focused process or 5ghz for a high performance computing focused process. Early on hitting that target speed is going to be harder and give you less usable chips at that speed. That will improve over time but it's never going to give you 5ghz HPC parts from a low power process. Nothing say the HPC process can't be your first process you work on but for TSMC with Apple being their leading edge customer they are obviously going to focus on the type of process Apple needs first because that is what Apple is paying for.
Well yes, without the mobile revolution there was no reason for all these fabs to gear up for leading edge to the point of beating Intel. That was Intel’s mistake, declining to make low margin low power ARM stuff.
intel's mistake was coasting on its current fabs while everyone else was expanding to meet skyrocketing demand. tsmc/samsung can eat some yields to keep on schedule if they have to, intel's perpetually supply limited and seemed to live in a fantasy where they could get perfect yields on 10nm by 2017. their sudden rush to dump 100B in fabs is no coincidence, got too greedy and now they finally have to pay up.
This is broadly true, but Intel's 10nm is a pretty extreme example - it was a real mess and didn't make it to server chips until 3 years after the initial "launch" of some dual-core mobile chips.
"Wouldn't imagine the first N3 part to be a desktop CPU unless it's made super-wide or slow" Not likely to be the first part, but Apple's M-series might be an early candidate for TSMC N3
Is it a coincidence AMD called it "high-performance computing", the same term used by TSMC to describe N4X?
December 17, 2021: "TSMC this week announced a new fabrication process that is tailored specifically for high-performance computing (HPC) products."
January 10, 2021: "Dr Su reinforced that technology roadmaps are all about making the right choices and the right junctures, and explicitly stated that our 5nm technology is highly optimized for high-performance computing – it’s not necessarily the same as some other 5nm technologies out there."
Surely, AMD knew high-performance computing has a lay definition and a very specific CPU definition (e.g., HPC aka supercomputers), so did they not notice the coincidence, they saw it and didn't care ("hype the fans!" yet won't deliver...), or they're gently confirming it? I mean, nobody would mind Zen4 on N4X...
I don't know. Don't want to start a rumor here. I'm genuinely curious; could be we're all just too plugged in and read too much into these things haha
Why do you people keep making stuff up? It's not N4X, it can never be N4X. First of all, Lisa Su explicitly said 5nm, not 5nm-class, otherwise there's no 6nm just 7nm. Secondly it takes at least two years from announcing a node to mass production, that'll be end of 2023 at best for N4X.
Also AMD have always been using a better or rather HPC optimised process. AMD never used vanilla N7 or N7P. TSMC referred to Zen2 process as N7 "large die" despite Zen2 being much smaller than A12X/A13. Microsoft referred to the improved version as N7e. You are the same kind of people who believed 7nm+ is N7+, when it's in fact just N7e based on enhanced N7P.
No they wont. The N4X node isn't even in risk production as of yet. AMD will for sure be using N5 however it could be tweaked a bit for say fin pitch etc just for AMD.
However could AMD have a Zen4 refresh of sorts like Zen+? Sure.
they're expecting something like 2024 for N4X so that makes no sense at all. if they were using N4X they would say N4X as it would be considerably better than N5, and it's not like intel can magically materialize a better node if AMD were to announce N4X chips.
Hey, IIRC "high performance computing" is the term TSMC uses for flavours of its process which go into PC, server, GPU (i.e. fast boxes which plug into a wall). Usually used in contrast to LP or low power variants which is what goes into smartphones.
So its different from the traditional usage of HPC in a supercomputing (e.g. Top500 context). Bit confusing I know but don't read too much into it!
It won't be N4X as this arrives way later. There is two reasonable options in my opinion AMD will use: Regular improved N5P [with slightly adjusted libraries] or N5HPC [which is expected H2/2022].
TSMC N4X as version to N4 is 2023/24 and beyond. However I guess as TSMC has N7HPC and N5HPC I would asume N4X is just a similar process with different naming sheme. Also N4X seems quite close to N3 and N4P to what is possible so I am not sure if we see a lot N4X...
Yeah, N5HPC lines up pretty darn well, and with volume production slated for Q2'22. Of course TSMC also uses HPC to refer to one of the libraries they typically offer with each node, along with HD (High Density) and, beginning with N3, HC (High Current). AMD may be employing some additional DTCO here as well.
This paragraph is preposterous: "Even today, if we go beyond 5nm, Mediatek has already announced that its upcoming Dimensity 9000 smartphone chip is on TSMC 4nm and will come to market earlier this year. TSMC’s 3nm process is expected to ramp production at the end of 2022, for a consumer launch in early 2023. By those metrics, AMD is behind a process node or two by the time Zen 4 chiplets come to market later this year."
Let me get this straight, no products using TSMC N4 have actually shipped yet, and N3 will not ship until next year, but AMD will be behind by a process node or two when they ship N5 products later this year?!?
If AMD intended to ship a product in 2022, N3 was not an appropriate choice, because it would not have been available in time. That's why Apple will be using N4 for the A16. N4 is just an extension of N5, using the same design rules with a 6% optical shrink. N5P is also an extension of N5 and actually offers higher performance at ISO power than N4 despite not getting the optical shrink or perhaps using quite as many EUV layers. It's also what Apple uses for the A15, which was released just over a quarter ago. Your metrics are way, way off if you think that N5P in 2022 constitutes being behind by 1 to 2 process nodes.
Your use of years is a little misleading. AMD is genuinely barely missing the latest nodes' high-volume phase either by weeks or a quarter at most. Likewise, AMD CPUs stay a while on the market, so just missing the latest node does put them at a node disadvantage of at least one full node. It is more cost effective for AMD (not that they're still passing along those savings...) to not align their releases with the latest nodes.
If Apple could pivot to N4, so could've AMD. Goodness knows Apple has to deal with an order of magnitude higher volume & far stricter deadlines.
No it's not misleading at all. Because AMD isn't planning a Dec 31, 2022 release for Zen 4. TSMC N3 will barely be emerging from risk production when AMD plans on shipping Ryzen 7000. AMD will also be shipping a fully validated server platform, one that is already sampling to customers, before the first client N3 products hit the market. The only realistic take here is that when AMD ships Zen 4, it will in fact be manufactured on the highest performance and most advanced process available at that time. Waiting a year for N3 or two years for N2 was not a viable an option.
And once again, AMD chose N5P because it is *higher perfomance* than N4. Apple cares more about area and power rather than outright performance because they're making smartphone chips.
Also AMD doesn't need to be on 3nm because Intel is far behind at 10nm / 7nm level. Plus high power CPUs need to be on the most optimized for high performance processors than those BGA use and throw smartphone processors.
Apple pays a ton so they get that top first batch from TSMC.
If you take 2.0x as being the traditional density scaling factor for a new process node, AMD will never be one full node behind, let alone two nodes. Furthermore, they will be on a more advanced process than Intel in both the desktop and server spaces for close to a year if not longer. TSMC N5/N5P also happens to be 1.7x the density of Intel 7, which is what Intel is using for Alder Lake, Raptor Lake, Sapphire Rapids, and Emerald Rapids.
Sorry to keep harping on about this, but my mind boggles at the sophistic bullshit that Ian presented in this post.
We haven't seen 2x node scaling for a long time (last time Intel tried it, they failed badly). A full node scaling is ~1.6-1.8x for TSMC. You're right that saying AMD is 2 nodes behind is wrong given that N4/N4P are not all that different from N5P.
However consider this: in 12-15 months there will be various 3nm products. If AMD sticks to a 24 month schedule, they might use N3E in mid/late 2024. That means they will be a full node behind for about 18 months.
None of this matters for desktops since the main competition is Intel, but it does for laptops and servers where there is increasing competition from Ampere, Apple, Qualcomm, Alibaba, AWS Graviton etc.
Area scaling from TSMC N7 to N4 (the compact version of N5) is 2x. We're still getting full nodes, just not in one bite. Intel switched to hyper-scaling as they adopted multi-patterning, and you're right, it didn't work. However, they were attempting 2.45x scaling with 14nm and 2.7x with 10nm, which is crazy aggressive.
Zen4+ on N4X would require minimal redesign and could ship H1'24. N4X should offer equivalent performance to base N3, albeit at lower density.
AMD will only be behind once products they actually compete against are manufactured on a more advanced node and become available in the market. For Intel, AMD's primary competitor, the only thing on the horizon is Meteor Lake in H1'23. That's a Foveros design using Intel 7, Intel 4, and possibly TSMC N4 and N3, and it looks like the ULV (U9/U15) chips will be the first out the gate. Apple could potentially release an M2 on N4 in Q4'22, but they still haven't released their HEDT / workstation class chips on N5 yet. Q4'23 is the earliest they would have any M series chips on N3, and they certainly wouldn't be starting with the higher performance chips. Off the top of my head, I can't speak to the ARM server vendors' plans.
I agree. This reads like Ian needed to write SOMETHING based on his roundtable interview and decided to punch it up a little without having the data back up the narrative being pushed here.
Honestly if Ian thinks AMD should have delayed Zen 4 to align with node availability (at the cost of a worse competitive landscape) he should just say that. No reason to take what is an editorial opinion and try and turn it into a reporting story though.
I think a more honest answer would have been "Well, we are in the lead and Intel is stuck on 10nm. What's the incentive to move fast and forgo milking the cow as long as possible?"
There isn't a better TSMC process than 5nm for HPC this year or next year. Even if AMD delayed Zen4 a lot for 3nm availability they would not have had enough wafers to make anything in volume and it would have cost a fortune. Just look at Intel with 10nm and how long they took to make something in significant quantity like Alder Lake and how they had to sell 14nm+++ at a significant discount in the mean time.
The most important AMD part that needs a different process node, is the I/O die in the Epycs. That is drinking to much juice from the total power envelope that could be used to feed the dozens of thirsty cpu cores.
I don’t think they can shrink it because it’s connected to so many pins powering so many ports and slots. The only advantage of printing it on 7nm would be power efficiency at an enormous wafer cost.
If I were Nvidia, I would throw crazy money for TSMC 4nm. If the they managed to have incredible gpus with Samsung shitty 8nm, imagine what they can achieve with a way superior node.
And I hope we get a PS5 Pro by the the time of 3nm. That can run stuff 1440/120.
TLDR: We're forced to drool on Apple's chips for another year because Intel is so late and AMD and NVIDIA are too occupied price gouging their consumers and don't feel the need to compete.
By this time, Apple user will get laptop with 3 nm Chips that will consume 20 % less energy than with 5 nm, stay fresh as 100 % CPU utilization and probably 20 % faster too.
Intel can afford to throw money at TSMC to maintain market share, buying their way into leading edge nodes. Meanwhile, AMD is a smaller company that needs to prepare for a long-term struggle to retain the market share they've gained. By staying behind on the node race and relying on their architectural advancements, they can grow their war chest, and try to weather the storm.
We’ve updated our terms. By continuing to use the site and/or by logging into your account, you agree to the Site’s updated Terms of Use and Privacy Policy.
Facebook
Twitter
RSS
44 Comments
Back to Article
Wrs - Monday, January 10, 2022 - link
Seems a common pattern that early iterations of a process node scale poorly in frequency and current density and even yield. Thus why Intel 10nm started off in laptops and server chips, only showing up a year later in desktops. Wouldn't imagine the first N3 part to be a desktop CPU unless it's made super-wide or slow. Just makes more sense for that to be a mobile or limited-volume server part.FreckledTrout - Monday, January 10, 2022 - link
That example for Intel doesn't hold true. Usually what you will see especially TSMC they will make a new node for lower power. So the current 5nm that Apple chips are made on are the low power / high density process. Then about a year later they tweak the process for high power chips by making various tweaks. The 5nm node from TSMC should be tweaked out heavily for AMD by the time mass production starts.kpb321 - Monday, January 10, 2022 - link
Yield is pretty inherent. Yield always goes up as the process matures, or really the defect density goes down. This means smaller chips are always easier to manufacture earlier as a defect will at worst case make a smaller part of the wafer unusable.Frequency isn't as straight forward AFAIK. Probably the simplest way to think about it is that a given process has a target max frequency. Say 2ghz for a low power process or 3ghz for a Mobile focused process or 5ghz for a high performance computing focused process. Early on hitting that target speed is going to be harder and give you less usable chips at that speed. That will improve over time but it's never going to give you 5ghz HPC parts from a low power process. Nothing say the HPC process can't be your first process you work on but for TSMC with Apple being their leading edge customer they are obviously going to focus on the type of process Apple needs first because that is what Apple is paying for.
coburn_c - Monday, January 10, 2022 - link
It's almost as if TSMC's diverse customer base helps drives its fab supremacy.Wrs - Tuesday, January 11, 2022 - link
Well yes, without the mobile revolution there was no reason for all these fabs to gear up for leading edge to the point of beating Intel. That was Intel’s mistake, declining to make low margin low power ARM stuff.whatthe123 - Tuesday, January 11, 2022 - link
intel's mistake was coasting on its current fabs while everyone else was expanding to meet skyrocketing demand. tsmc/samsung can eat some yields to keep on schedule if they have to, intel's perpetually supply limited and seemed to live in a fantasy where they could get perfect yields on 10nm by 2017. their sudden rush to dump 100B in fabs is no coincidence, got too greedy and now they finally have to pay up.Fulljack - Wednesday, January 12, 2022 - link
Samsung has diverse customer too, but they are comparatively has worse manufactured chips on the same (claimed) process.Spunjji - Tuesday, January 11, 2022 - link
This is broadly true, but Intel's 10nm is a pretty extreme example - it was a real mess and didn't make it to server chips until 3 years after the initial "launch" of some dual-core mobile chips."Wouldn't imagine the first N3 part to be a desktop CPU unless it's made super-wide or slow"
Not likely to be the first part, but Apple's M-series might be an early candidate for TSMC N3
ikjadoon - Monday, January 10, 2022 - link
Is it a coincidence AMD called it "high-performance computing", the same term used by TSMC to describe N4X?December 17, 2021: "TSMC this week announced a new fabrication process that is tailored specifically for high-performance computing (HPC) products."
January 10, 2021: "Dr Su reinforced that technology roadmaps are all about making the right choices and the right junctures, and explicitly stated that our 5nm technology is highly optimized for high-performance computing – it’s not necessarily the same as some other 5nm technologies out there."
Surely, AMD knew high-performance computing has a lay definition and a very specific CPU definition (e.g., HPC aka supercomputers), so did they not notice the coincidence, they saw it and didn't care ("hype the fans!" yet won't deliver...), or they're gently confirming it? I mean, nobody would mind Zen4 on N4X...
I don't know. Don't want to start a rumor here. I'm genuinely curious; could be we're all just too plugged in and read too much into these things haha
ikjadoon - Monday, January 10, 2022 - link
Source for the TSMC N4X article:https://www.anandtech.com/show/17123/tsmc-unveils-...
nandnandnand - Monday, January 10, 2022 - link
N4X is definitely considered a 5nm-class node and that might be what AMD is using here.The rumor that AMD would be using a better version of 5nm for Zen 4 has been floating around since April 2020:
https://wccftech.com/amd-zen-4-tsmc-enhanced-5nm-n...
dotjaz - Tuesday, January 11, 2022 - link
Why do you people keep making stuff up? It's not N4X, it can never be N4X. First of all, Lisa Su explicitly said 5nm, not 5nm-class, otherwise there's no 6nm just 7nm. Secondly it takes at least two years from announcing a node to mass production, that'll be end of 2023 at best for N4X.dotjaz - Tuesday, January 11, 2022 - link
Also AMD have always been using a better or rather HPC optimised process. AMD never used vanilla N7 or N7P. TSMC referred to Zen2 process as N7 "large die" despite Zen2 being much smaller than A12X/A13. Microsoft referred to the improved version as N7e.You are the same kind of people who believed 7nm+ is N7+, when it's in fact just N7e based on enhanced N7P.
dotjaz - Tuesday, January 11, 2022 - link
AMD will eventually use N4X with enhancements, likely in 2024 or later. But never the plain version.FreckledTrout - Monday, January 10, 2022 - link
No they wont. The N4X node isn't even in risk production as of yet. AMD will for sure be using N5 however it could be tweaked a bit for say fin pitch etc just for AMD.However could AMD have a Zen4 refresh of sorts like Zen+? Sure.
scineram - Tuesday, January 11, 2022 - link
Zen 5 is more likely for that N4X node me thinks.whatthe123 - Monday, January 10, 2022 - link
they're expecting something like 2024 for N4X so that makes no sense at all. if they were using N4X they would say N4X as it would be considerably better than N5, and it's not like intel can magically materialize a better node if AMD were to announce N4X chips.ikjadoon - Monday, January 10, 2022 - link
> expect the first N4X designs to hit the market in early 2024Oh, yes. That’s it. The last paragraph in the N4X article nailed it.
Thank you for the correction.
Jon Tseng - Tuesday, January 11, 2022 - link
Hey, IIRC "high performance computing" is the term TSMC uses for flavours of its process which go into PC, server, GPU (i.e. fast boxes which plug into a wall). Usually used in contrast to LP or low power variants which is what goes into smartphones.So its different from the traditional usage of HPC in a supercomputing (e.g. Top500 context). Bit confusing I know but don't read too much into it!
dotjaz - Tuesday, January 11, 2022 - link
Exactly, TSMC referred to those in various slides as N7 "large die", N5 HPC etc. "Large die" was Zen2 ironically smaller than A12/12X/13.Matthias B V - Tuesday, January 11, 2022 - link
It won't be N4X as this arrives way later. There is two reasonable options in my opinion AMD will use: Regular improved N5P [with slightly adjusted libraries] or N5HPC [which is expected H2/2022].TSMC N4X as version to N4 is 2023/24 and beyond. However I guess as TSMC has N7HPC and N5HPC I would asume N4X is just a similar process with different naming sheme. Also N4X seems quite close to N3 and N4P to what is possible so I am not sure if we see a lot N4X...
repoman27 - Tuesday, January 11, 2022 - link
Yeah, N5HPC lines up pretty darn well, and with volume production slated for Q2'22. Of course TSMC also uses HPC to refer to one of the libraries they typically offer with each node, along with HD (High Density) and, beginning with N3, HC (High Current). AMD may be employing some additional DTCO here as well.Here's a link with a little more info on the HPC flavors: https://community.cadence.com/cadence_blogs_8/b/br...
repoman27 - Monday, January 10, 2022 - link
This paragraph is preposterous: "Even today, if we go beyond 5nm, Mediatek has already announced that its upcoming Dimensity 9000 smartphone chip is on TSMC 4nm and will come to market earlier this year. TSMC’s 3nm process is expected to ramp production at the end of 2022, for a consumer launch in early 2023. By those metrics, AMD is behind a process node or two by the time Zen 4 chiplets come to market later this year."Let me get this straight, no products using TSMC N4 have actually shipped yet, and N3 will not ship until next year, but AMD will be behind by a process node or two when they ship N5 products later this year?!?
If AMD intended to ship a product in 2022, N3 was not an appropriate choice, because it would not have been available in time. That's why Apple will be using N4 for the A16. N4 is just an extension of N5, using the same design rules with a 6% optical shrink. N5P is also an extension of N5 and actually offers higher performance at ISO power than N4 despite not getting the optical shrink or perhaps using quite as many EUV layers. It's also what Apple uses for the A15, which was released just over a quarter ago. Your metrics are way, way off if you think that N5P in 2022 constitutes being behind by 1 to 2 process nodes.
ikjadoon - Monday, January 10, 2022 - link
I mean...AMD Zen3 (on N7): Q4 2020
TSMC N5: Q4 2020
AMD Zen4 (on N5-class): Q4 2022
TSNC N3: Q1 2023
Your use of years is a little misleading. AMD is genuinely barely missing the latest nodes' high-volume phase either by weeks or a quarter at most. Likewise, AMD CPUs stay a while on the market, so just missing the latest node does put them at a node disadvantage of at least one full node. It is more cost effective for AMD (not that they're still passing along those savings...) to not align their releases with the latest nodes.
If Apple could pivot to N4, so could've AMD. Goodness knows Apple has to deal with an order of magnitude higher volume & far stricter deadlines.
repoman27 - Monday, January 10, 2022 - link
No it's not misleading at all. Because AMD isn't planning a Dec 31, 2022 release for Zen 4. TSMC N3 will barely be emerging from risk production when AMD plans on shipping Ryzen 7000. AMD will also be shipping a fully validated server platform, one that is already sampling to customers, before the first client N3 products hit the market. The only realistic take here is that when AMD ships Zen 4, it will in fact be manufactured on the highest performance and most advanced process available at that time. Waiting a year for N3 or two years for N2 was not a viable an option.And once again, AMD chose N5P because it is *higher perfomance* than N4. Apple cares more about area and power rather than outright performance because they're making smartphone chips.
Silver5urfer - Monday, January 10, 2022 - link
Makes sense.Also AMD doesn't need to be on 3nm because Intel is far behind at 10nm / 7nm level. Plus high power CPUs need to be on the most optimized for high performance processors than those BGA use and throw smartphone processors.
Apple pays a ton so they get that top first batch from TSMC.
repoman27 - Monday, January 10, 2022 - link
Here are the logic densities of everything on the roadmap from TSMC or Intel for the next three years:TSMC N5/N5P = 171.3 MTr/mm² (1.0x)
TSMC N4/N4P/N4X = 182.23 MTr/mm² (1.06x)
Intel 4/3 <= 237.18 MTr/mm² (1.4x)
TSMC N3/N3E = 291.21 MTr/mm² (1.7x)
If you take 2.0x as being the traditional density scaling factor for a new process node, AMD will never be one full node behind, let alone two nodes. Furthermore, they will be on a more advanced process than Intel in both the desktop and server spaces for close to a year if not longer. TSMC N5/N5P also happens to be 1.7x the density of Intel 7, which is what Intel is using for Alder Lake, Raptor Lake, Sapphire Rapids, and Emerald Rapids.
Sorry to keep harping on about this, but my mind boggles at the sophistic bullshit that Ian presented in this post.
cheshirster - Tuesday, January 11, 2022 - link
Good points you have.Wilco1 - Tuesday, January 11, 2022 - link
We haven't seen 2x node scaling for a long time (last time Intel tried it, they failed badly). A full node scaling is ~1.6-1.8x for TSMC. You're right that saying AMD is 2 nodes behind is wrong given that N4/N4P are not all that different from N5P.However consider this: in 12-15 months there will be various 3nm products. If AMD sticks to a 24 month schedule, they might use N3E in mid/late 2024. That means they will be a full node behind for about 18 months.
None of this matters for desktops since the main competition is Intel, but it does for laptops and servers where there is increasing competition from Ampere, Apple, Qualcomm, Alibaba, AWS Graviton etc.
repoman27 - Tuesday, January 11, 2022 - link
Area scaling from TSMC N7 to N4 (the compact version of N5) is 2x. We're still getting full nodes, just not in one bite. Intel switched to hyper-scaling as they adopted multi-patterning, and you're right, it didn't work. However, they were attempting 2.45x scaling with 14nm and 2.7x with 10nm, which is crazy aggressive.Zen4+ on N4X would require minimal redesign and could ship H1'24. N4X should offer equivalent performance to base N3, albeit at lower density.
AMD will only be behind once products they actually compete against are manufactured on a more advanced node and become available in the market. For Intel, AMD's primary competitor, the only thing on the horizon is Meteor Lake in H1'23. That's a Foveros design using Intel 7, Intel 4, and possibly TSMC N4 and N3, and it looks like the ULV (U9/U15) chips will be the first out the gate. Apple could potentially release an M2 on N4 in Q4'22, but they still haven't released their HEDT / workstation class chips on N5 yet. Q4'23 is the earliest they would have any M series chips on N3, and they certainly wouldn't be starting with the higher performance chips. Off the top of my head, I can't speak to the ARM server vendors' plans.
dotjaz - Tuesday, January 11, 2022 - link
AMD can't be on N3 anyway. Zen4 would be running at something like 3.2GHz base and 3.8GHz boost if it were on N3.Sunrise089 - Monday, January 10, 2022 - link
I agree. This reads like Ian needed to write SOMETHING based on his roundtable interview and decided to punch it up a little without having the data back up the narrative being pushed here.Honestly if Ian thinks AMD should have delayed Zen 4 to align with node availability (at the cost of a worse competitive landscape) he should just say that. No reason to take what is an editorial opinion and try and turn it into a reporting story though.
Sychonut - Monday, January 10, 2022 - link
I think a more honest answer would have been "Well, we are in the lead and Intel is stuck on 10nm. What's the incentive to move fast and forgo milking the cow as long as possible?"demian_thorne - Tuesday, January 11, 2022 - link
true dat LOLsgeocla - Tuesday, January 11, 2022 - link
There isn't a better TSMC process than 5nm for HPC this year or next year. Even if AMD delayed Zen4 a lot for 3nm availability they would not have had enough wafers to make anything in volume and it would have cost a fortune. Just look at Intel with 10nm and how long they took to make something in significant quantity like Alder Lake and how they had to sell 14nm+++ at a significant discount in the mean time.ricebunny - Tuesday, January 11, 2022 - link
The author made an unsubstantiated claim that TSMC’s 2020 5nm process was suitable for AMD’s Zen CPUs in terms of frequency scaling.The whole article went south from there.
Foeketijn - Tuesday, January 11, 2022 - link
The most important AMD part that needs a different process node, is the I/O die in the Epycs. That is drinking to much juice from the total power envelope that could be used to feed the dozens of thirsty cpu cores.Wrs - Tuesday, January 11, 2022 - link
I don’t think they can shrink it because it’s connected to so many pins powering so many ports and slots. The only advantage of printing it on 7nm would be power efficiency at an enormous wafer cost.Vitor - Tuesday, January 11, 2022 - link
If I were Nvidia, I would throw crazy money for TSMC 4nm. If the they managed to have incredible gpus with Samsung shitty 8nm, imagine what they can achieve with a way superior node.And I hope we get a PS5 Pro by the the time of 3nm. That can run stuff 1440/120.
Silma - Tuesday, January 11, 2022 - link
TLDR: We're forced to drool on Apple's chips for another year because Intel is so late and AMD and NVIDIA are too occupied price gouging their consumers and don't feel the need to compete.By this time, Apple user will get laptop with 3 nm Chips that will consume 20 % less energy than with 5 nm, stay fresh as 100 % CPU utilization and probably 20 % faster too.
Kvaern1 - Thursday, January 13, 2022 - link
Dialing in a node for large power hungry chips running at clockspeeds north of 4.5Ghz isn't as easy as you seem to think.Wereweeb - Tuesday, January 11, 2022 - link
Intel can afford to throw money at TSMC to maintain market share, buying their way into leading edge nodes. Meanwhile, AMD is a smaller company that needs to prepare for a long-term struggle to retain the market share they've gained. By staying behind on the node race and relying on their architectural advancements, they can grow their war chest, and try to weather the storm.Business as usual, really.
zodiacfml - Tuesday, January 11, 2022 - link
in other words, other companies buying much of TSMC's latest and greatest and AMD will have to do with what is left.Brooklyn11203 - Friday, January 21, 2022 - link
We Specialize In Installing Security Camera Systems For Businesses & Buildings www.technicoss.com