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  • solidsnake1298 - Monday, June 7, 2021 - link

    Oof. Those timings. I know with the doubling of banks that there are performance advantages, I'm assuming with regards to throughput, but I wonder what the performance penalty is due to the latency of CL40 timings.

    I'm currently running a kit of Samsung B-die at 3533MT @ 14-15-14-28 on a Ryzen 2700X (all secondary and tertiary timings also tuned according DRAM calculator). Scaling up the CL linearly from 3533MT to 4800MT comes out to about CL19. Even cheaper CL16 and CL18 kits would linearly scale to way below CL40.

    I know, practically, it wouldn't work that way. But I'm just trying to point out that good, even average, DDR4 kits will have significant latency advantages for a while. Which was also the case when we transitions from DDR3 to DDR4.

    I wonder how long it will be before we see the DDR5 equivalent of Samsung B-die.
  • jsz - Monday, June 7, 2021 - link

    This is completely reliant on CPU/Memory architecture.

    - Intel for example actually benefits in terms of overall ns latency and super PI calculation synthetics due to tighter timings with "slower" ram. On AMD, "fast ram" outweighs tighter timings as long as within 1:1 Infinity Fabric.

    -3200 CL14 bins were already out in 2015, not even a year after the transition period.

    -Your 3533 MT/S cl14 tune is getting outperformed by any run of the mill 3600-3800 cl16-18 tune on a modern zen2/3 in AIDA. Timings aren't that relevant on AMD's current memory sub system. MT/s 1:1 to Infinity fabric is more important.

    The only place where Samsung B-die has a legitimate advantage on current platforms is TRFC timings. They can be tuned lower than any other memory die on DDR4.
  • Techtree101 - Monday, June 7, 2021 - link

    This is how memory always works from generation to generation. It's not a linear scale. Ignore your preconceptions about timings and know that these are just fine for DDR5.
  • meacupla - Monday, June 7, 2021 - link

    I understand it's just a render, but why is the PCB so tall and barren?
    I don't even see open pads for more memory chips to be added on a 32GB model.
  • vikas.sm - Wednesday, June 16, 2021 - link

    Plain-jane unregistered DDR5 is dense enough for 128gb dual rank on a single DIMM!
    The render is for a 16GB DIMM, hence single-rank only. I guess they didn't bother rendering the second rank of contact pads.
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