Probably right, yes. But the flip side is that Apple also probably financed that 3nm capacity one way or another... So you can be mad that Apple gets it first. Or you can be grateful that everyone else get it at all, even if they get it a year after Apple.
a) a comment on a news post is not 'news' and can thus not be 'fake news' b) 'fake news' implies that the poster has made up the things reported in order to purposely mislead readers, typically to achieve a political or commercial purpose. Unless you have some information to bring to the table, there's no reason to read that into that post. c) shouting "fake news" at something without actually arguing how or why it is so is reductive and deeply problematic, essentially a bad-faith derailing tactic.
Lolwut? They're currently producing all current-gen Apple chips on n5, which is anything but insignificant in terms of volume even if it's just a single customer, and are promising a doubling of that volume this year. According to their (sadly unlabeled) comparative/cumulative graph, 2021 n5 capacity is ~half of 2021 n7 capacity. And n7 is a very high capacity node.
12TB is a silly question. The use of CXL (in its memory version) on the mac pro is not a silly question -- though one that's not likely to be answered! Of course who knows what will be revealed next Tuesday...
No one is selling in volume any high powered chips on TSMC's 5 nm yet, and won't be until 2022. Intel's 10 nm is like TSMC's 7 nm, and Intel's 7 nm is somewhere between TSMC's 5 nm and TSMC's 3 nm. Intel plans to have high volume high powered chips on their 7 nm process in 2023, so, while Intel did give up the lead they had before the 10 nm node, you are grossly exaggerating the situation by comparing apples to oranges.
You do realize high power is a NEGATIVE, right? It's like you're complaining that "the problem with these electric cars is that their engines just don't get hot enough. How am I going to fry my eggs at a tailgate party?"
What? Apple has been using 5nm TSMC chips since the iPhone 12 launched, and are also using it for the M1. The A14 has been on sale for more than half a year, and has likely sold hundreds of millions of units.
I don't think the guy has seen the benchmarks yet where the A14/M1 spanks most of Intel in IPC and Performance per watt. In comparable workloads! He's living in bizarro world.
AMD might have a chance it didn't have a massive IO die on an older process. But they are going for servers. Apple is going for your hand held device.
Your equivalences are right about the component density, at least about the theoretical component density.
In practice, even the SuperFin Intel 10 nm is significantly worse than the TSMC 7 nm.
Even if the Intel 10 nm is supposed to have the same density, AMD can easily provide a 3 times larger cache memory at the same price.
That is likely due to the Intel process having far more defects at a given chip size and to the failure of Intel to predict that their process will have so many defects, in order to switch earlier to multiple chip designs, like AMD did. So their good density does not matter if they cannot manufacture as many components on a chip as TSMC.
The second problem for Intel is that their even their 10 nm SuperFin transistors are worse than the 7 nm TSMC transistors, so at identical number of active cores and identical power consumption the clock frequency is lower for Intel, or if the clock frequency is raised to match AMD, then the power consumption is higher.
The only hope for Intel is the improved 10 nm process used for Alder Lake, which is expected to allow higher clock frequencies than the 7 nm TSMC process, while hopefully not having a worse energy efficiency.
However, next year the competition will began to use the TSMC 5 nm process, so even if the Enhanced SuperFin process will be proven to be better than the TSMC 7 nm, it will not enjoy supremacy for a long time.
there is a difference in core logic and cache logic density.... why is the internet always so mind stuck with aging marketing density figures...
Intel original proposed density is nowhere near there final density, due to so many issues they had to adapt over and over again. So I would not bet that suddenly they can also deliver the 7nm on original target.
Intel could be behind the density thing to save face. I was just surprised Intel's 8 core Tiger Lake lags in efficiency vs months old Ryzen 5000 mobile, considering Intel has better IPC
On the one hand: yay, more wafers of more efficient nodes!
On the other hand: things aren't looking good for Sammy, Intel, et al. I really hope they succeed with their GAA-FET's, otherwise we might end up with a TSMC monopoly.
Intel and TSMC are competitors. Intel and AMD are competitors. The enemy of my enemy is my friend. Until Intel becomes fabless it's in TSMC best interest to allow AMD to take as much market share from Intel as possible.
They'd end up hurting the whole ecosystem, though. And it'd have the effect of bidding up the price, which would ultimately finance TSMC's build-out of more capacity.
Also, TSMC is competing with Intel for equipment and consumables, such as wafers. So, the more they bid up TSMC's prices, the more it hurts their own buildout plans and production costs.
Agreed N5 have better yields thanks to EUV but what about output ?? The EVU scanners are really slow and not much reliable, so at the end N5 is a big problem for many. No volume N7 will remain the dominant process for a lot.
The huge delay of AMD Zen 4 (only sometime in H2/2022 or early 2023) is something to think about. Cause process concerns now AMD is at a two years refresh from a steady one year (or little more) refresh
This doesn’t seem to get true at all. TSMC is working capacity. There is so much demand they haven’t been able to meet, some manufacturers are having their parts built on the inferior Samsung process. By the end of this year, n5 will catch up to n7, and by mid next year, bypass it.
N5 capacity will grow to 120k wpm and that's it. There is a reason, TSMC want's to built a fourth Phase for N5, but even TSMC and Dacin will need two years for the realisation. N7 capacity already reached 140k wpm by the end of 2020 and is still expanded.
That bit about TSMC using their own pellicles for EUV since 2019 is indeed interesting; EUV scanners apparently either require especially hard UV radiation-resistant pellicles, use them up faster, or both. Thus, as TSMC has their own, home made pellicles, and if those are better than third party ones are, that would go some way to explain why TSMC has better EUV processes and yields than, let's say, Samsung's foundries.
We’ve updated our terms. By continuing to use the site and/or by logging into your account, you agree to the Site’s updated Terms of Use and Privacy Policy.
Facebook
Twitter
RSS
50 Comments
Back to Article
toukale - Tuesday, June 1, 2021 - link
I am sure Apple already bought all of those 3nm capacity for their iPhone 14 family and more.sonny73n - Wednesday, June 2, 2021 - link
^ Fake newsmelgross - Wednesday, June 2, 2021 - link
Nah, he’s probably right.name99 - Wednesday, June 2, 2021 - link
Probably right, yes.But the flip side is that Apple also probably financed that 3nm capacity one way or another...
So you can be mad that Apple gets it first. Or you can be grateful that everyone else get it at all, even if they get it a year after Apple.
Valantar - Thursday, June 3, 2021 - link
a) a comment on a news post is not 'news' and can thus not be 'fake news'b) 'fake news' implies that the poster has made up the things reported in order to purposely mislead readers, typically to achieve a political or commercial purpose. Unless you have some information to bring to the table, there's no reason to read that into that post.
c) shouting "fake news" at something without actually arguing how or why it is so is reductive and deeply problematic, essentially a bad-faith derailing tactic.
So, in essence, please stop abusing that term.
TeXWiller - Tuesday, June 1, 2021 - link
It's nice to see EUV starting to deliver on promise.eek2121 - Tuesday, June 1, 2021 - link
TSMC continues to fire on all cylinders.Gondalf - Wednesday, June 2, 2021 - link
At a low volume rate. Irrelevant for the marketQasar - Wednesday, June 2, 2021 - link
ahh gandolf.. you are hilarious.Valantar - Thursday, June 3, 2021 - link
Lolwut? They're currently producing all current-gen Apple chips on n5, which is anything but insignificant in terms of volume even if it's just a single customer, and are promising a doubling of that volume this year. According to their (sadly unlabeled) comparative/cumulative graph, 2021 n5 capacity is ~half of 2021 n7 capacity. And n7 is a very high capacity node.igor velky - Tuesday, June 1, 2021 - link
Anandtech should ask Apple if they plan to put 12 TB of CXL RAM in their macpro.eek2121 - Tuesday, June 1, 2021 - link
hint: the answer is no.melgross - Wednesday, June 2, 2021 - link
It was a joke.name99 - Wednesday, June 2, 2021 - link
12TB is a silly question.The use of CXL (in its memory version) on the mac pro is not a silly question -- though one that's not likely to be answered!
Of course who knows what will be revealed next Tuesday...
movax2 - Tuesday, June 1, 2021 - link
So while Intel was trying to make work their 10nm, then 10nm+, "Superfin" 10nm, "Enhanced".... Raptor Lake (2022) still 10nm ...TSMC actually has went from 10nm -> 7nm -> 5nm -> 3nm (2022)
Yojimbo - Tuesday, June 1, 2021 - link
No one is selling in volume any high powered chips on TSMC's 5 nm yet, and won't be until 2022. Intel's 10 nm is like TSMC's 7 nm, and Intel's 7 nm is somewhere between TSMC's 5 nm and TSMC's 3 nm. Intel plans to have high volume high powered chips on their 7 nm process in 2023, so, while Intel did give up the lead they had before the 10 nm node, you are grossly exaggerating the situation by comparing apples to oranges.zodiacfml - Wednesday, June 2, 2021 - link
Nope. That's what we all thought. After seeing the 8 core Tiger Lake reviews, it appears Intel's 10nm is inferior to TSMC 7nmMobile-Dom - Wednesday, June 2, 2021 - link
given the amount of iPhones sold annually, now including macs and iPad with M1, I think its fair to say that there is a fair amount of TSMC 5nm chips.unless you meant high wattage parts, then in that case I agree, most is the jumped up M1 that rarely hits 40w
sonny73n - Wednesday, June 2, 2021 - link
Yojimbo, Intel 10nm chips consume so much power. They're like TSMC 12nm. So get out of here with your BS.name99 - Wednesday, June 2, 2021 - link
You do realize high power is a NEGATIVE, right?It's like you're complaining that "the problem with these electric cars is that their engines just don't get hot enough. How am I going to fry my eggs at a tailgate party?"
shadowjk - Thursday, June 3, 2021 - link
What he means is TSMC 5nm is only used to make tiny little electric scooter engines, and he's interested in seeing pickup truck engines made on 5nm.Valantar - Thursday, June 3, 2021 - link
What? Apple has been using 5nm TSMC chips since the iPhone 12 launched, and are also using it for the M1. The A14 has been on sale for more than half a year, and has likely sold hundreds of millions of units.hechacker1 - Friday, June 4, 2021 - link
I don't think the guy has seen the benchmarks yet where the A14/M1 spanks most of Intel in IPC and Performance per watt. In comparable workloads! He's living in bizarro world.AMD might have a chance it didn't have a massive IO die on an older process. But they are going for servers. Apple is going for your hand held device.
mode_13h - Friday, June 4, 2021 - link
> AMD might have a chance it didn't have a massive IO die on an older process.Their APUs don't. Those are monolithic.
eek2121 - Tuesday, June 1, 2021 - link
As other folks have mentioned, Intel 10nm = TSMC 7nm. TSMC 5nm = Intel 7nm. People wonder why Intel wants to rebrand…AdrianBc - Wednesday, June 2, 2021 - link
Your equivalences are right about the component density, at least about the theoretical component density.In practice, even the SuperFin Intel 10 nm is significantly worse than the TSMC 7 nm.
Even if the Intel 10 nm is supposed to have the same density, AMD can easily provide a 3 times larger cache memory at the same price.
That is likely due to the Intel process having far more defects at a given chip size and to the failure of Intel to predict that their process will have so many defects, in order to switch earlier to multiple chip designs, like AMD did. So their good density does not matter if they cannot manufacture as many components on a chip as TSMC.
The second problem for Intel is that their even their 10 nm SuperFin transistors are worse than the 7 nm TSMC transistors, so at identical number of active cores and identical power consumption the clock frequency is lower for Intel, or if the clock frequency is raised to match AMD, then the power consumption is higher.
The only hope for Intel is the improved 10 nm process used for Alder Lake, which is expected to allow higher clock frequencies than the 7 nm TSMC process, while hopefully not having a worse energy efficiency.
However, next year the competition will began to use the TSMC 5 nm process, so even if the Enhanced SuperFin process will be proven to be better than the TSMC 7 nm, it will not enjoy supremacy for a long time.
zodiacfml - Wednesday, June 2, 2021 - link
This!! After seeing the 8 core Tiger Lake reviews, it appears Intel's 10nm is inferior to TSMC 7nmduploxxx - Wednesday, June 2, 2021 - link
there is a difference in core logic and cache logic density.... why is the internet always so mind stuck with aging marketing density figures...Intel original proposed density is nowhere near there final density, due to so many issues they had to adapt over and over again. So I would not bet that suddenly they can also deliver the 7nm on original target.
zodiacfml - Wednesday, June 2, 2021 - link
Intel could be behind the density thing to save face. I was just surprised Intel's 8 core Tiger Lake lags in efficiency vs months old Ryzen 5000 mobile, considering Intel has better IPCmelgross - Wednesday, June 2, 2021 - link
2023Anymoore - Tuesday, June 1, 2021 - link
5nm has actually been diluting their margins, its cost is still high. Not to mention, the tool power requirements are a strong concern.eek2121 - Tuesday, June 1, 2021 - link
5nm is actually significantly cheaper (and more profitable) than 7nm for TSMC.Anymoore - Wednesday, June 2, 2021 - link
TSMC said so themselves that 5nm was more expensive, in their quarterlies.melgross - Wednesday, June 2, 2021 - link
Sure. 7nm is mature, and cheaper. But 5nm has significantly better yield. It should be cheaper before too long, if not already.Anymoore - Wednesday, June 2, 2021 - link
The yield is not better for 5nm.Anymoore - Wednesday, June 2, 2021 - link
The lower D0 is from being a newer fab with previous learnings, but customer X did not see better yield over quadruple patterning.Wereweeb - Wednesday, June 2, 2021 - link
On the one hand: yay, more wafers of more efficient nodes!On the other hand: things aren't looking good for Sammy, Intel, et al. I really hope they succeed with their GAA-FET's, otherwise we might end up with a TSMC monopoly.
zodiacfml - Wednesday, June 2, 2021 - link
No fan but Intel should buy more TSMC capacity to limit AMDs.sgeocla - Wednesday, June 2, 2021 - link
Intel and TSMC are competitors. Intel and AMD are competitors. The enemy of my enemy is my friend. Until Intel becomes fabless it's in TSMC best interest to allow AMD to take as much market share from Intel as possible.mode_13h - Wednesday, June 2, 2021 - link
They'd end up hurting the whole ecosystem, though. And it'd have the effect of bidding up the price, which would ultimately finance TSMC's build-out of more capacity.Also, TSMC is competing with Intel for equipment and consumables, such as wafers. So, the more they bid up TSMC's prices, the more it hurts their own buildout plans and production costs.
mode_13h - Wednesday, June 2, 2021 - link
> such as wafersI mean substrate, but I can imagine there are other upstream inputs also in short supply.
Gondalf - Wednesday, June 2, 2021 - link
Agreed N5 have better yields thanks to EUV but what about output ??The EVU scanners are really slow and not much reliable, so at the end N5 is a big problem for many. No volume
N7 will remain the dominant process for a lot.
The huge delay of AMD Zen 4 (only sometime in H2/2022 or early 2023) is something to think about. Cause process concerns now AMD is at a two years refresh from a steady one year (or little more) refresh
Smell This - Wednesday, June 2, 2021 - link
Gondaft and his trolling FUD have become a stable here, at AT.
Thanks for playing. We enjoy your swings, and misses, and look forward to your future mind-bending gyrations and contortions of the truth ...
Gondalf - Wednesday, June 2, 2021 - link
The realty is worse than dreams Smell. You trust too much in Foundries claims.mode_13h - Wednesday, June 2, 2021 - link
So, what do you trust too much in?Qasar - Wednesday, June 2, 2021 - link
no, your reality is worse, and you trust to much in anything intel tells youmelgross - Wednesday, June 2, 2021 - link
This doesn’t seem to get true at all. TSMC is working capacity. There is so much demand they haven’t been able to meet, some manufacturers are having their parts built on the inferior Samsung process. By the end of this year, n5 will catch up to n7, and by mid next year, bypass it.smalM - Friday, June 4, 2021 - link
N5 capacity will grow to 120k wpm and that's it. There is a reason, TSMC want's to built a fourth Phase for N5, but even TSMC and Dacin will need two years for the realisation.N7 capacity already reached 140k wpm by the end of 2020 and is still expanded.
eastcoast_pete - Wednesday, June 2, 2021 - link
That bit about TSMC using their own pellicles for EUV since 2019 is indeed interesting; EUV scanners apparently either require especially hard UV radiation-resistant pellicles, use them up faster, or both. Thus, as TSMC has their own, home made pellicles, and if those are better than third party ones are, that would go some way to explain why TSMC has better EUV processes and yields than, let's say, Samsung's foundries.Anymoore - Saturday, June 5, 2021 - link
Found that interesting too. One has to wonder where Samsung is as far as pellicles are concerned.TSMC's pellicle talk does conflict a previous brag: https://esg.tsmc.com/csr/en/update/greenManufactur...