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  • Infy2 - Tuesday, October 6, 2020 - link

    I wonder if effective memory latency will go up or down compared to DDR4. Aside from theoretical memory bandwidth tests, real-world workloads (such as games), seem to benefit more from lower memory latency than higher bandwidth.
  • Ian Cutress - Tuesday, October 6, 2020 - link

    These are JEDEC specification server modules. So sub-timings are higher than a consumer binned chip. We won't know what they'll get until the consumer module makers start playing around with binning. JEDEC is conservative to help with power, manufacturing, and compliance. The slower you go, the easier it is to stay in the lines :)
  • PeachNCream - Tuesday, October 6, 2020 - link

    Bandwidth improvements alone are going to be very helpful on the consumer side for people that rely on system memory to for a computer's iGPU, but latency improvements are also important. Lots of iGPUs have the raw computational power to handle fairly demanding graphical needs, but have always been held back by the lack of bandwidth and responsiveness of RAM. I'm excited by the potential DDR5 will offer in that regard.
  • poorAPUguy - Tuesday, October 6, 2020 - link

    The article doesnt seem to paint a very hopeful picture in that regard, however... It was said that for DDR4 3200MHz vs DDR5 MHz, the latter would have 30% more bandwidth simply from the new design. So why is it that now DDR5 4800MHz should have only a 30% bandwidth uplift from DDR4 3200MHz when it has an additional 50% clock speed?
  • benedict - Tuesday, October 6, 2020 - link

    You don't understand how memory works. There is no such thing as DDR4 3200MHz.
    DDR4 3200 works at 200MHz. DDR5 4800 works at 150MHz. The number signifies maximum theoretical bandwidth which is rarely used in real-time applications.
  • poorAPUguy - Tuesday, October 6, 2020 - link

    So you're saying that this generation we should expect 30% real world bandwidth improvements and not the 2x that has been plastered everywhere. Got it. Thanks.
  • Wilco1 - Sunday, October 18, 2020 - link

    No. Because it is more efficient, DDR5 gives 35% higher achieved bandwidth at the same data rate as DDR4. According to https://cdn.mos.cms.futurecdn.net/XixTkXjLK2pmiu47... DDR5-4800 has 1.87 times the bandwidth of DDR4-3200. So we can expect huge improvements in performance, particularly in servers with lots of cores.
  • proflogic - Wednesday, October 21, 2020 - link

    Heh, DDR4-3200 operates at 1600 MHz, not 200 MHz. You would have to go back a good number of years to be back at 200 MHz. The 3200 here represents 3200 MT/s (i.e. a single pin transfers 3200 Mbps), and since this is dual data rate, with 2 bits per clock, the clock frequency is half.

    There's a different marketing nomenclature that sometimes gives total bandwidth figures, but DDR4 really is doing GHz frequencies on the motherboard. And now, for DDR5, we're looking at single-ended buses operating at up to 4.2 GHz. Those must be some super tight layout guidelines...
  • TeXWiller - Tuesday, October 6, 2020 - link

    The future legendary DDR5 frame-rate smoothness on multi-core systems shall be a key selling point for the module manufacturers. The more mellow RGB lighting effects of those modules will portray the quality of life, free from the stresses of memory walls and unnecessary queuing while allowing for more relaxed, unconstrained experience and the free breathing of a plurality of memory controllers. I'd expect nothing less. ;)
  • godrilla - Wednesday, October 7, 2020 - link

    Currently we are at a plateau with DDR4 ram and the Gskill neo 3800 cl14 is the best money can buy.
  • JlHADJOE - Tuesday, October 6, 2020 - link

    Finally!

    I've been hanging on to this Sandy Bridge Xeon for god knows how long trying to skip DDR4.
  • x064 - Tuesday, October 6, 2020 - link

    Me and you both. Sandy Bridge in my laptop, and an Ivy Bridge Xeon in my desktop.
  • IBM760XL - Tuesday, October 6, 2020 - link

    Same! It seems like it's perpetually two years in the future, but it has to arrive eventually... hopefully while our Sandy Bridges are still working.
  • StevoLincolnite - Tuesday, October 6, 2020 - link

    Same... Got a Sandy Bridge workstation, trying to hold out, trying!
  • Aries1470 - Wednesday, October 7, 2020 - link

    Are you goes sure that you ain't going "a bridge too far"? ;-)
  • headeffects - Tuesday, October 6, 2020 - link

    Anything about ECC being standard? This is something I’ve read here in the past and am not sure what it means in practice. This articles mentions non-ECC memory.
  • ArcadeEngineer - Tuesday, October 6, 2020 - link

    DDR5 chips have on-die ECC to fix single errors but this doesn't replace module-level ECC. Ryan Smith goes into it in one of the first comments here; https://www.anandtech.com/show/15912/ddr5-specific...
  • Xajel - Tuesday, October 6, 2020 - link

    This this different that current ECC.

    DDR5 ECC protects against data errors and corruptions for the data in the RAM, so it protects for example against any data damage that could happen from electromagnetic noise or even cosmic rays :D

    But it doesn't protect against data error and corruptions that happens between the CPU (IMC) and the DDR module. If for example the EM noise affected the data while going to the DDR module and the data arrived corrupted, the module will not know this is corrupted data and will just store them and protect them from being altered while it saves them.

    This is not like regular ECC on current RAM like ECC DDR4 or ECC DDR3 which makes sure that the data that being sent to the DDR modules is received intact without errors.
  • headeffects - Tuesday, October 6, 2020 - link

    Thank! Bummer though. I assume LPDDR5 RAM will also include this?
  • JlHADJOE - Tuesday, October 6, 2020 - link

    IMO they should just make it standard. It pretty much was back in the 386 days when we had to plug in a third SIMM for parity.
  • azfacea - Tuesday, October 6, 2020 - link

    DSDR ??? is it double side double rank ???
  • azfacea - Tuesday, October 6, 2020 - link

    this would theoretically help APU catch up with lower end cards, but with what NVIDIA just did on ampere no catching up anytime soon. Good for rising core counts and maintaining BW per core.

    I personally dont think DDR5 makes much of a difference for most ppl unless we get GDDR7 based on it.
  • azfacea - Tuesday, October 6, 2020 - link

    consumer market that is.
  • poorAPUguy - Tuesday, October 6, 2020 - link

    I'm feeling pessimistic about that. 50% more bandwidth for APUs when there has been a core doubling to eat that increase will probably leave the GPUs as starved as ever. At this point I'm not even sure the Rembrandt iGPU will even beat a GTX 1050. Sad.
  • Spunjji - Wednesday, October 7, 2020 - link

    Not sure the maths works out on this. iGPU performance didn't drop *after* the core doubling with Renoir (in fact it went up a little) and it's not likely to double again soon, so in theory there should be a solid benefit.
  • Spunjji - Wednesday, October 7, 2020 - link

    Dedicated GPUs will *always* be ahead of APUs, but this will indeed narrow the gap a little further than it has been before.

    If the rumours about RDNA 2's bandwidth efficiency bear out (and apply equally to the APU version of it) then we might actually see something truly impressive happen in that area.
  • epobirs - Wednesday, October 7, 2020 - link

    It doesn't matter what happens at the high end. The baseline is still what determines how developers and publishers make their choices. The market is driven by what the majority of people have as opposed to what a very few have in their computers. Recent Steam hardware survey indicated only a tiny portion of accounts were playing with RTX GPUs, making it insane for company in 2020 to publish a game that doesn't run on substantially weaker hardware. When Intel or AMD ships a major improvement to IGA performance across millions of new PCs, this is where the baseline publishers use to judge the minimum target platform moves upward.

    The latest and greatest GPUs define what is possible. IGA defines what your market likely has. Somewhere in between is the place where most of the active spending on games happens. The first IGA that includes hardware ray tracing will mark where the feature becomes truly usable in the eyes of mainstream game publishing.
  • azfacea - Saturday, October 17, 2020 - link

    This is just not true. maybe somewhat true in some niche cases, or maybe a high volume esport. this is just not how rockstar designs the next GTA.
  • lilkwarrior - Sunday, October 18, 2020 - link

    Newflash: This tech overwhelmingly does not revolve around gamers. Nvidia has its dominance because of accommodating pros & high-end users first & foremost. They trickle in their defect cards from appealing such audiences to top-of-the-line consumer cards.
  • ArcadeEngineer - Tuesday, October 6, 2020 - link

    Would this result in big jumps for Zen, given the infinity fabric-memory clock linkage?
  • haukionkannel - Tuesday, October 6, 2020 - link

    Noup... it depend more on the base clock. Aka clocspeed before multiplications. Because most ddr4 now have 200hz bace clock (ddr4 3200) and these new ddr5 have 150hz base clock it means that infinity fabric will run slower. It gets better when we get ddr5 that has higher bace clock... to the certain limit. For ddr4 the optimum is ddr4 3600 or 3776 depending on how good your cpus memory contollers is.
  • back2future - Tuesday, October 6, 2020 - link

    Can somebody guess what's the amount of installed/produced DDR3, DDR4 ram modules that have been produced/sold until now?
    DDR3: Q1/2014 had ~6 billion Gbits to Q4/2016 ~3.3 billion Gb shipped (top 7.3 billion Gb ~Q1/Q2 2015)
    DDR4: Q1/2014 no recognizable market share to Q4/2016 ~6.6 billion Gb shipped (Q3/2016 higher market share than DDR3: 4 bGbits_DDR3 : 5.2 bGbits_DDR4)
    (source https://www.statista.com/statistics/781334/worldwi...
    DDR5: ?
  • back2future - Tuesday, October 6, 2020 - link

    Full amount is on several billion GB (including mobile memory share was ~15 billion Gbits 10 years ago, 2010), means that 8GB RDIMM memory modules that are ~2W for a total of about few GW power addition every year ( but minus the amount of replaced older memory modules, that needed higher power / capacity )?
  • nand_guy - Tuesday, October 6, 2020 - link

    Is this announcement significantly different from Micron's announcement 3 months ago?
    https://www.crn.com/news/components-peripherals/mi...
    Or this one a few days ago:
    Micron Technology is at the Forefront of the DDR5 Revolution
    1 Oct 2020
    excerpt:
    In January 2020, Micron announced its roll-out of DDR5 RDIMM samples. In July 2020, JEDEC (the global standards organization for the electronics industry) published its widely-anticipated JESD79-5 DDR5 SDRAM standard. Because of their experience with the technicalities of the new DRAM and their engagement with the new standards, companies like Micron, Cadence, Montage, Rambus, Renesas and Synopsys exist at the nexus of market demands and technical development. With the TEP, this group of businesses will work hand-in-hand with channel partners like distributors, value-added resellers, and OEMs as they develop new products using this new tech.

    DDR5 is the most technologically advanced DRAM to date. Built off of Micron’s industry-leading 1znm process technology, DDR5 delivers an over 85% increase in memory performance. The key to this advancement is memory density - DDR5 has double that of its predecessor DDR4. In this infographic, see how DRAM has experienced exponential increases in speed over time, and how DDR5 is the best yet.
    continues at https://www.arrow.com/en/research-and-events/artic...
  • Tomatotech - Tuesday, October 6, 2020 - link

    I'm struggling a bit to understand the DDR5 memory layout. Just to check, the dual bank design doesn't mean ATX motherboards will move to 8 RAM slots and ITX motherboards will move to 4 RAM slots?
  • Spunjji - Wednesday, October 7, 2020 - link

    Nope - that division is at the module level.
  • Santoval - Sunday, October 11, 2020 - link

    There is an error in your table. The bus width of LPDDR5 is not 16-bits but 32-bits (2x16-bits), just like LPDDR4/LPDDR4X.
  • certifyalldm - Monday, October 12, 2020 - link

    cosair is playing well in its business too. acquiring more companies. this will be great for company's future. i think they have a big image in their business head. companies like google and semrush and more have very tough exams. you can shoose to prepare for them here https://answerout.com
  • dotes12 - Tuesday, October 13, 2020 - link

    I assume that even though 1 stick of DDR5 memory has 2 channels, that only means that your typical desktop CPU with 2 memory channels will be able to run in dual channel memory mode when only 1 memory stick is installed. I highly doubt desktop CPUs are going to double the number of memory channels they have from 2 to 4 to actually take advantage of this, it's simply for OEM system builders to finally say they have dual channel memory even though they only put 1 memory stick in the motherboard.
  • supdawgwtfd - Saturday, October 17, 2020 - link

    That's not how it works at all...

    The Memory controller sticks to 2 channel.

    The RAM is 2 internal channels so that it is easier to have the higher clock speeds.

    It's output is still a single channel as far as the IMC is concerned.
  • kepstin - Friday, February 19, 2021 - link

    The thing that matters here isn't the number of channels, but rather the width (number of bits) of the memory interface.

    Current consumer CPUs have a 128bit memory bus, so you use pairs of DDR4 DIMMs which provide a 64bit memory bus each for a total of 2×64bit

    Future consumer CPUs will probably still have a 128bit memory bus, so you will use pairs of DDR5 DIMMs which each provide two 32bit memory busses for a total of 4×32bit.
  • lorribot - Sunday, October 18, 2020 - link

    In the consumer space this will be troubling for AMD. Intel cares little about backwards compatibility and will therefor just create a new socket and all that But AMD has made a big play about AM4 sockets for all it processors but none of the old processors will be able to run DDR5 and the new processors will not be able support DDR4 and 5 due to the changes in power for DDR5 and the controller changes, so AMD will either have to produce two processors, one AM4 DDR4 and one DDR5 and new chipsets, so they may as well do a new socket and will likely get a big pasting over it. Maybe a good time to go all in on PCIe 5 as well.

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