I was hoping to see memory sticks jump from 64 bit to 128 bit, or at least 96 bit. A typical memory chip supports 32 bits of data width. With just 8 chips on a stick for 1 memory rank that's 256 bits of potential throughput, so that's not a bottleneck. Doing 128 bit would be easy. It's just a matter of board wiring density and cost.
That would mean more pins on the socket as well, and perhaps unecessary cost on the low end with embedded stuff, IoT, mobile etc.
Maybe future DDR revisions could diverge? LPDDRX keeps the narrow bus, while high end DDR uses more pins or maybe a different form factor (sockets?). Something will need to be done at the top end, as servers cant just keep bumping up per socket channel counts.
The type of memory chips used on memory sticks used in PC's (SDRAM, DDR1/2/3/4/5) are all 8-bits. GDDR5/X/6 uses 32-bit chips. That's why we have 64-bit sticks that have multiples of 8 chips on them (for non ECC). So yeah the sticks would be a lot more complex and expensive -- which is why we just use multiple sticks for wider interfaces. 2ch = 128-bit, 4ch = 256-bit, etc.
Zen 3 is still AM4 and DDR4 isnt it? and thats not landing till this fall. So we wont see Zen 4, AM5 and DDR5 platform till fall 2021 then. Maybe Intel has made the jump to DDR5 for Rocket Lake and its LGA1700 socket. 2021 looks to be a good battle, and good time to build a new rig!
This is all rumor, but the rumors are that Zen 3 will be a bit delayed, and Rocket Lake (a 14nm Tiger Lake) will use the same socket as Comet Lake. So it will still be DDR4 as well.
Alder Lake would theoretically be the first DDR5 desktop part from Intel, and Zen 4 the first part from AMD, likely late in 2021 from both.
AMD officially have a 12~18 months cycle, Zen2 was launched in July-2019, so Zen3 can be launched anywhere from July-2020 to January-2021 without the excuse of being delayed.
The last I heard, they plan to launch it 4Q20, maybe October/November timeframe. So no delays of any sort here.
Zen 4 will have DDR5 controllers only if the final draft of DDR5 is published (or is given to them by JEDEC pre-publication) before the development of Zen 4 is completed. Otherwise DDR5 will need to wait for Zen 5 (in that case the AM5 socket will be DDR5 ready -even if Zen 4 does not have DDR5 controllers- and would need to have pins for both DDR4 & DDR5, which might be a bit troublesome).
My educated guess is that AMD would never add DDR5 support to Zen 4 without having the final draft, because you never know what might change in the final spec at the last minute. It might be better to delay the release of Zen 4 a few months, if required, so that DDR5 support is added. AMD need DDR5 even more than Intel due to their higher number of cores. They need it because they cannot add more memory channels to Epyc (in particular) if they want to offer more than 64 cores. Zen 3 based Epyc CPUs will retain the 64-core limit, thus the next time to increase cores should be when they release Zen 4 based Epyc CPUs.
Zen 4 based APUs, in turn, should add support for LPDDR5. AMD could add such support to their Zen 3 based APUs as well, due to the quite earlier availability of LPDDR5, but I doubt they will.
You do realise none of this make sense apart from the APU part, right? Zen 2 and above are DRAM agnostic.
AMD will have the IO die (and AM5) with DDR5 ready when the market is ready and pair it with the Zen X module. It's very much feasible to have Zen 3 with current IO die at first next year then by then end of the year, an updated version with a new DDR5 IO die and AM5. They might even do it with Zen 4 to give AM4 platform one last upgrade.
AMD has said more than once Zen3 is AM4 so yes for sure it is not using DDR5 for Zen3. For Zen4 that is where the rumor mill comes in and its very likely they will be using DDR5 since AMD is moving to a new socket with Zen4. However they could use DDR4 for Zen4 but have enough pins in the socket to switch over to DDR5 for Zen5 and not have to change sockets.
At this stage, I actually don't find DDR5 exciting from a retail user standpoint. At a frequency of 4800, high end DDR4 are already there despite consuming more power. Also, I am expecting a steep increase in the latency just to bump the speed up, which somewhat negates the benefit of the speed bump. Historically, latency have crept from low single digits to now mid to high 10s from DDR to now DDR4.
You've picked some of the higher numbers for each memory speed. DDR2 started at 533Mhz, DDR3 started off at 1066 and most official support ended at 1600Mhz. DDR4 official support started at 2133 and is now at 3200.
I think your overall point still stands, though. While there hasn't been much of an improvement in latency, the degradation isn't that marked, either - and some things do just need more bandwidth.
All correct except there not being any worsening of latency. I spent too much time compiling the list to add pointless upgrades where previous generations offered the same/similar speed at worse latency. My point is that most considered purchases of RAM remain at around 10ns latency. What has changed during this period is improved controllers, which generally have delivered lower effective latencies in spite of this pattern while obviously allowing much higher bandwidth.
"...where previous generations offered the same/similar speed at worse latency" Better latency that should read (can't edit). i.e. at the time, getting an X38/X48 chipset with DDR3 1066Mhz CL7 rather than a P45 chipset and DDR2 1066Mhz CL5 made less sense for most (it was also cheaper and allowed a 2166Mhz bus at 1:1 ratio) However, Sandy/Ivy bridge was the mature part of the cycle where DDR3 2133Mhz CL9 was cheaper and offered potentially better latency over early DDR4 modules. We may well see high speed, sub 10ns DDR4 at good prices before competitive DDR5 comes along.
Zen 3 promises 10-15 % increase in performance. Considering zen 4 on 5nm process (85% density increase) and DDR5 it will be very hard for zen 3 to make big numbers on the consumer /enthusiast side. I think they need to improve the platform, 10gbe, thunderbolt 4/usb4, and 4/8 pcie lanes more wouldn't be a bad idea. Let's see what will happen
We’ve updated our terms. By continuing to use the site and/or by logging into your account, you agree to the Site’s updated Terms of Use and Privacy Policy.
19 Comments
Back to Article
Khenglish - Friday, March 27, 2020 - link
I was hoping to see memory sticks jump from 64 bit to 128 bit, or at least 96 bit. A typical memory chip supports 32 bits of data width. With just 8 chips on a stick for 1 memory rank that's 256 bits of potential throughput, so that's not a bottleneck. Doing 128 bit would be easy. It's just a matter of board wiring density and cost.brucethemoose - Friday, March 27, 2020 - link
That would mean more pins on the socket as well, and perhaps unecessary cost on the low end with embedded stuff, IoT, mobile etc.Maybe future DDR revisions could diverge? LPDDRX keeps the narrow bus, while high end DDR uses more pins or maybe a different form factor (sockets?). Something will need to be done at the top end, as servers cant just keep bumping up per socket channel counts.
extide - Friday, March 27, 2020 - link
The type of memory chips used on memory sticks used in PC's (SDRAM, DDR1/2/3/4/5) are all 8-bits. GDDR5/X/6 uses 32-bit chips. That's why we have 64-bit sticks that have multiples of 8 chips on them (for non ECC). So yeah the sticks would be a lot more complex and expensive -- which is why we just use multiple sticks for wider interfaces. 2ch = 128-bit, 4ch = 256-bit, etc.dotjaz - Saturday, March 28, 2020 - link
Not all 8bit, there're also 4bit and 16bit widely in use.saratoga4 - Saturday, March 28, 2020 - link
>I was hoping to see memory sticks jump from 64 bit to 128 bitThat would defeat the purpose of DDR5. If you want more channel width at lower capacity, you're supposed to use GDDR or LPDDR.
psyclist80 - Friday, March 27, 2020 - link
Zen 3 is still AM4 and DDR4 isnt it? and thats not landing till this fall. So we wont see Zen 4, AM5 and DDR5 platform till fall 2021 then. Maybe Intel has made the jump to DDR5 for Rocket Lake and its LGA1700 socket. 2021 looks to be a good battle, and good time to build a new rig!Cygni - Friday, March 27, 2020 - link
This is all rumor, but the rumors are that Zen 3 will be a bit delayed, and Rocket Lake (a 14nm Tiger Lake) will use the same socket as Comet Lake. So it will still be DDR4 as well.Alder Lake would theoretically be the first DDR5 desktop part from Intel, and Zen 4 the first part from AMD, likely late in 2021 from both.
Again just rumor, so take it for what its worth.
Xajel - Sunday, March 29, 2020 - link
Which rumour said Zen 3 will be delayed?AMD officially have a 12~18 months cycle, Zen2 was launched in July-2019, so Zen3 can be launched anywhere from July-2020 to January-2021 without the excuse of being delayed.
The last I heard, they plan to launch it 4Q20, maybe October/November timeframe. So no delays of any sort here.
[email protected] - Monday, March 30, 2020 - link
I had a partner tell me that the new serverchips (EPYC 3) are goign to launch this summer, with availability later in the year.Santoval - Friday, March 27, 2020 - link
Zen 4 will have DDR5 controllers only if the final draft of DDR5 is published (or is given to them by JEDEC pre-publication) before the development of Zen 4 is completed. Otherwise DDR5 will need to wait for Zen 5 (in that case the AM5 socket will be DDR5 ready -even if Zen 4 does not have DDR5 controllers- and would need to have pins for both DDR4 & DDR5, which might be a bit troublesome).My educated guess is that AMD would never add DDR5 support to Zen 4 without having the final draft, because you never know what might change in the final spec at the last minute. It might be better to delay the release of Zen 4 a few months, if required, so that DDR5 support is added. AMD need DDR5 even more than Intel due to their higher number of cores. They need it because they cannot add more memory channels to Epyc (in particular) if they want to offer more than 64 cores. Zen 3 based Epyc CPUs will retain the 64-core limit, thus the next time to increase cores should be when they release Zen 4 based Epyc CPUs.
Zen 4 based APUs, in turn, should add support for LPDDR5. AMD could add such support to their Zen 3 based APUs as well, due to the quite earlier availability of LPDDR5, but I doubt they will.
dotjaz - Saturday, March 28, 2020 - link
You do realise none of this make sense apart from the APU part, right? Zen 2 and above are DRAM agnostic.AMD will have the IO die (and AM5) with DDR5 ready when the market is ready and pair it with the Zen X module. It's very much feasible to have Zen 3 with current IO die at first next year then by then end of the year, an updated version with a new DDR5 IO die and AM5. They might even do it with Zen 4 to give AM4 platform one last upgrade.
FreckledTrout - Monday, March 30, 2020 - link
AMD has said more than once Zen3 is AM4 so yes for sure it is not using DDR5 for Zen3. For Zen4 that is where the rumor mill comes in and its very likely they will be using DDR5 since AMD is moving to a new socket with Zen4. However they could use DDR4 for Zen4 but have enough pins in the socket to switch over to DDR5 for Zen5 and not have to change sockets.DanNeely - Saturday, March 28, 2020 - link
Is the others category in the graph primarily GDDR/HBM ram, or something else?watzupken - Monday, March 30, 2020 - link
At this stage, I actually don't find DDR5 exciting from a retail user standpoint. At a frequency of 4800, high end DDR4 are already there despite consuming more power. Also, I am expecting a steep increase in the latency just to bump the speed up, which somewhat negates the benefit of the speed bump. Historically, latency have crept from low single digits to now mid to high 10s from DDR to now DDR4.BushLin - Monday, March 30, 2020 - link
Err... Looking at decent, mainstream, non-overvolted RAM over time:400Mhz DDR CL2 - 10ns
500Mhz DDR CL2.5 - 10ns
800Mhz DDR2 CL4 - 10ns
1066Mhz DDR2 CL5 - 9.38ns
1600Mhz DDR3 CL8 - 10ns
2133Mhz DDR3 CL10 - 9.38ns
3200Mhz DDR4 CL16 - 10ms
3600Mhz DDR4 CL18 - 10ms
When was it dramatically better than 10ns?
Spunjji - Tuesday, March 31, 2020 - link
You've picked some of the higher numbers for each memory speed. DDR2 started at 533Mhz, DDR3 started off at 1066 and most official support ended at 1600Mhz. DDR4 official support started at 2133 and is now at 3200.I think your overall point still stands, though. While there hasn't been much of an improvement in latency, the degradation isn't that marked, either - and some things do just need more bandwidth.
BushLin - Tuesday, March 31, 2020 - link
All correct except there not being any worsening of latency. I spent too much time compiling the list to add pointless upgrades where previous generations offered the same/similar speed at worse latency.My point is that most considered purchases of RAM remain at around 10ns latency.
What has changed during this period is improved controllers, which generally have delivered lower effective latencies in spite of this pattern while obviously allowing much higher bandwidth.
BushLin - Tuesday, March 31, 2020 - link
"...where previous generations offered the same/similar speed at worse latency"Better latency that should read (can't edit).
i.e. at the time, getting an X38/X48 chipset with DDR3 1066Mhz CL7 rather than a P45 chipset and DDR2 1066Mhz CL5 made less sense for most (it was also cheaper and allowed a 2166Mhz bus at 1:1 ratio)
However, Sandy/Ivy bridge was the mature part of the cycle where DDR3 2133Mhz CL9 was cheaper and offered potentially better latency over early DDR4 modules.
We may well see high speed, sub 10ns DDR4 at good prices before competitive DDR5 comes along.
umano - Thursday, April 2, 2020 - link
Zen 3 promises 10-15 % increase in performance. Considering zen 4 on 5nm process (85% density increase) and DDR5 it will be very hard for zen 3 to make big numbers on the consumer /enthusiast side. I think they need to improve the platform, 10gbe, thunderbolt 4/usb4, and 4/8 pcie lanes more wouldn't be a bad idea. Let's see what will happen