That's one very big and chewy information pie to digest, thank you for that!
I fear that even if the technology motivation is all clear if still difficult in its own right, the political issues or rather the governance of the interconnect standards will slow things down significantly.
From 10km above, I see a repeat of what happened with motherboards and chipsets, where Intel in search for additional revenue and repurpasing of older fab capacity turned from partner to competitor. I can't see how this would be different at the SoC level, except perhaps RAM.
So, whoever goes enters into Intel's interconnect space, will need to think very hard on their longer term prospects.
And then I don't really see anyone letting Intel getting away with very much control for chiplet integration in the cloud and HPC space, while the equal or greater human:device spaces (smartphones and IoT) seem to remain 1-3 generation runs with scale flatening all integration benefits.
That leaves enterprise server and client or game consoles, perhaps some edge servers as primary benefactors, but also in a space where execution speed is perhaps so important, it may take too long to break even on the open integration vs. proprietary approach.
To make a long story short: Intel open chiplet integration sounds much less believeable and attractive than other solution.
Interesting interview as usual. Good one! "IC: Like 4G/5G modems? [laughs]"
Intel's manufacturing roadmap has a lot of back porting that didn't exist prior which is very smart imo could have saved them from there 10nm IceLake fiasco. I am left wondering if they are thinking more along the lines of chiplets when they are talking of back porting.
I think long term EMIB and Foveros will play out very well for Intel. However I can't overlook AMD's iterative approach and the success they are having.
Intel's Pentium D was literally glued together as there's not connection between the two Pentium 4 dies. They both connect to NB independently and share the FSB as a 2-way/2-socket server system. It was just the RAM controller was in the NB made it UMA instead of NUMA. At that point, Intel didn't have QPI or HyperTransport equivalent connects. So to share data Pentium D use FSB to sync the L2 cache just like how SLi sync VRAM for two graphic card. That significantly reduce the memory performance and Pentium D at that time was way slower than a single core Pentium 4.
They're interesting tech for sure, I just hope thermals are gonna be kept in check with the 3D stacking nature of Foveros. I don't think it's gonna be mind blowing revelations these techs, but time will tell. Infinity Fabric surprised everyone also.
I am curious what happening to original EMiB like Intel Chip in Dell XPS with AMD derived GPU. I assume that was really just plans to test ability of EMiB to use another companies GPU and likely Intel will use Xe in the future.
With all of the talk of thermal considerations at this level of integration, I'm surprised that microchannel cooling did not come up. I'm curious as to if Ian or anyone else there has had that discussion with similarly positioned design/fabrication folks.
I just cannot find enough words to express my gratitude. https://termpaperwriter.org service met all the requirements and finished my essay before the deadline without any mistakes or typos or in general any drawbacks. But for you I might have been expelled since my professors were really dissatisfied with my previous papers.
Samsung and Intel's recently announced collaboration on the Galaxy Book Pro laptops also mentioned goals of working together on a new chip microarchitecture with "multiple types of xpu cores". This sounds like the client 2.0 that Intel announced in August, 2020.
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abufrejoval - Friday, January 3, 2020 - link
That's one very big and chewy information pie to digest, thank you for that!I fear that even if the technology motivation is all clear if still difficult in its own right, the political issues or rather the governance of the interconnect standards will slow things down significantly.
From 10km above, I see a repeat of what happened with motherboards and chipsets, where Intel in search for additional revenue and repurpasing of older fab capacity turned from partner to competitor. I can't see how this would be different at the SoC level, except perhaps RAM.
So, whoever goes enters into Intel's interconnect space, will need to think very hard on their longer term prospects.
And then I don't really see anyone letting Intel getting away with very much control for chiplet integration in the cloud and HPC space, while the equal or greater human:device spaces (smartphones and IoT) seem to remain 1-3 generation runs with scale flatening all integration benefits.
That leaves enterprise server and client or game consoles, perhaps some edge servers as primary benefactors, but also in a space where execution speed is perhaps so important, it may take too long to break even on the open integration vs. proprietary approach.
To make a long story short: Intel open chiplet integration sounds much less believeable and attractive than other solution.
WaltC - Friday, January 3, 2020 - link
At least we know that Intel is at least thinking about producing new products, eventually. That's always comforting....;)FreckledTrout - Friday, January 3, 2020 - link
Interesting interview as usual. Good one! "IC: Like 4G/5G modems? [laughs]"Intel's manufacturing roadmap has a lot of back porting that didn't exist prior which is very smart imo could have saved them from there 10nm IceLake fiasco. I am left wondering if they are thinking more along the lines of chiplets when they are talking of back porting.
I think long term EMIB and Foveros will play out very well for Intel. However I can't overlook AMD's iterative approach and the success they are having.
alufan - Friday, January 3, 2020 - link
surely Intel would not stoop so low as to "glue" chips together:)tongue in cheek for the fanbois before the flames start
dullard - Friday, January 3, 2020 - link
The funny part is that it was AMD that first called Intel's chips glued together years before Intel joked back at AMD for doing the same thing.mikeztm - Friday, January 3, 2020 - link
Intel's Pentium D was literally glued together as there's not connection between the two Pentium 4 dies. They both connect to NB independently and share the FSB as a 2-way/2-socket server system. It was just the RAM controller was in the NB made it UMA instead of NUMA. At that point, Intel didn't have QPI or HyperTransport equivalent connects. So to share data Pentium D use FSB to sync the L2 cache just like how SLi sync VRAM for two graphic card. That significantly reduce the memory performance and Pentium D at that time was way slower than a single core Pentium 4.HStewart - Friday, January 3, 2020 - link
I thinking the designers of EMiB and Foveros will be laughing at people who call it glue together.Xyler94 - Friday, January 3, 2020 - link
Foveros is stacked, not glued :PThey're interesting tech for sure, I just hope thermals are gonna be kept in check with the 3D stacking nature of Foveros. I don't think it's gonna be mind blowing revelations these techs, but time will tell. Infinity Fabric surprised everyone also.
extide - Friday, January 3, 2020 - link
Who was surprised by Infinity Fabric? It's just an evolution of Hyper Transport.Threska - Saturday, January 4, 2020 - link
And sometimes evolution gives us...the Platypus.JayNor - Saturday, May 22, 2021 - link
With Ponte Vecchio now described as a 47 tile emib and foveros GPU, the "long term" has just gotten shorter.HStewart - Friday, January 3, 2020 - link
I am curious what happening to original EMiB like Intel Chip in Dell XPS with AMD derived GPU. I assume that was really just plans to test ability of EMiB to use another companies GPU and likely Intel will use Xe in the future.chophshiy - Friday, January 3, 2020 - link
With all of the talk of thermal considerations at this level of integration, I'm surprised that microchannel cooling did not come up. I'm curious as to if Ian or anyone else there has had that discussion with similarly positioned design/fabrication folks.mode_13h - Tuesday, January 7, 2020 - link
I'd just like to know if she's named after the beverage:https://en.wikipedia.org/wiki/Ramune
officesetup - Tuesday, January 21, 2020 - link
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johnronald2 - Thursday, January 23, 2020 - link
i like it <a href="google.com">very</a> much.ColtBergamo - Thursday, September 24, 2020 - link
I just cannot find enough words to express my gratitude. https://termpaperwriter.org service met all the requirements and finished my essay before the deadline without any mistakes or typos or in general any drawbacks. But for you I might have been expelled since my professors were really dissatisfied with my previous papers.pirspamela90 - Tuesday, December 15, 2020 - link
It was interesting to read this presentation and to know more about new Intel. Follow https://sportpeptides.com/ to read my site.JayNor - Saturday, May 22, 2021 - link
Samsung and Intel's recently announced collaboration on the Galaxy Book Pro laptops also mentioned goals of working together on a new chip microarchitecture with "multiple types of xpu cores". This sounds like the client 2.0 that Intel announced in August, 2020.