If I am not mistaken, this is the first 7nm A72 core. Given it's so old, my guess is this is a TSMC-lead research project, and ARM came in much later? Are than any further details on the CoWoS sandwich? Why does it have the last "oS?"
I assume the wafer is placed on the substrate to create a package that's slightly easier to work with, the substate (I assume an organic PCB-like material) being more flexible (both mechanically, and being available as a little mini-PCB on which you can place some capacitors on inductors or whatever as required by the package)?
Well duh. But that doesn't answer the question of why bother thinning the wafer and mounting it on substrate! That's the interesting issue, and the point I was trying to (guessing at!) answering.
Substrate is the organic package, and it's where the technology integrates with regular packaging/mounting technologies. Plus it provides package stiffness that would definitely not exist if you tried to mount the bare interposer onto a board. And you'd still need some sort of redistribution layer from the much tighter (TSV) bumps on the backside of the interposer to a pitch that can interface with a regular motherboard.
Interesting, but weird, wouldn't the A73 have been a better µarch for this project, considering the A72 was known for its high power consumption and overheating issues on mobile platforms?
The A72 has a rather long 15 stage pipeline, and clock speeds like that seem more plausible for this design than A73-A77 which all have shorter pipelines. Interposers like this might be featured on the next AX chip from apple to integrate Qualcomm's modem IP which they do not have in house and can't fab on-die.
Because Intel were never able to produce a viable 5G chipset and Apple had to sign a supply agreement with Qualcomm to cover the next couple of years. For the foreseeable future Apple will be using Qualcomm modems until they can fix the ex-Intel acquisition.
After Apple's Intel modem unit purchase, they have enough engineers to integrate Qualcomm's solutions and new patents to help them negotiate down licensing costs, but not enough to develop their own soup-to-nuts solution in 5G. This new generation will be much more complex in RFFE interactions with the modem, and you can be sure that after their first dance with Apple, Qualcomm won't be giving them nearly as much help as they did during 4G under their collaborative work agreement over which the legal fracas initially started. (It is a testament to Apple's clout over the industry and its manufacturers that it almost pulled off what it did with Dialog, PowerVR, and GTAT with a company the size of Qualcomm, but ultimately it is also a testament to the strength of Qualcomm's IP and its lead in 5G solutions that Apple settled despite its deep war-chest and the engineering aid of the similarly deep pocketed Intel.)
If Apple doubles their modem engineers and acquires an RFFE company such as Skyworks or Qorvo, then they would be getting serious about bringing an implementation in house, but it is very difficult to create a cellular implementation that is competitive with Qualcomm and rumors have it that Apple's internal timeline for such a solution is the mid 2020s (iirc 2023.) A purchase like this may come to pass as Qualcomm recently purchased their stake in their TDK 360 venture and will likely increase their content share of phones by becoming the reference design for many 5G solutions encompassing modem and RFFE, thus threatening the business of smaller RFFE companies in the next 5 years.
It seems Apple would draw the line and not be bothered with an RFFE. It’s a bit of a commodity even in 5G. Skyworks and Qorvo both sell a lot of non-handset parts that Apple probably wants no part in supporting.
15 stage is "kind of long" however, if both these 2 chips "talk nicely" to each other, this "real impact" might be ~10 stage or less (tandem compute .. I am call this way.. am sure there proper term .. medicine brain here not help.
maybe they dd A72 as the wires etc were "easier" to work with, vs maybe one that had been "clipped" to get highest possible performance (like AMD did with Radeon 4870 to 4890 .. same thing, just clip etc wire, ramp clocks, feed slight different power...new product.
maybe this is similar, take a "4870" clip extra wires when they go to RTM so effectively becomes a 4890..same "sauce" even faster as they had time to "tweak and tune"
--------------
odd that Ryzen (going my way of thought) is/has as many issue as did/does, maybe they forgot to "clip the wires"
something along them lines......
interesting..seems this is the "future path" all compute folks MUST take as the die size goes down, will be slower but able to do more (little bit more latency)
am sure the makers of these things pull their hair out constantly till they "oh crap, that is what issue was"
Ask Intel and Nvidia ... the ones who can do no wrong as hurting something bad overall, compared to what should (this what happens when NOT pay attention to customers who keep your business alive... they must have forgot this... MSFT sure as hell has...Apple is very lost cause at this point for "consumer" ... sandwich cart service is ok for sandwich cart....not for hundreds if not millions $$$$$$$$$$ product purchase......
not your sandwich once WE bought it you fools....am I right or am I right?
This is a very Interesting proof of concept, and especially attractive for situations where many cores/threads are highly desirable, and both cost and power consumption are important. Whoever gets the chiplets-on-interconnects just right is in a great position to sell many of them. If this works, ARM will make even more money for licenses, and TSMC probably doesn't mind getting lots of orders to fab the chiplets and interconnects. I wonder if "closed" shops like Anapurna (Amazon) are already developing their implementations.
It would be highly strange if they weren't as the entire industry has been trying to move in that direction for years, especially after AMD managed to pull it off so successfuly.
The question now will be the who can figure out ways that will bypass patents or patent a high performance feature variation.
Doesn't have to be a bypass of the patents involved here. I see this more as a demonstration or proof-of-concept for tech that can be licensed, and maybe even at decent rates, as long as you fab them with TSMC.
It is interesting to see so many new A72 designs in 2019, i guess TSMC likes them a lot (maybe they had a special license to the architecture?). For instance there was also the Xilinx versal, and Huawei's new 64-core thing, both A72 on TSMC in 2019.
Also the raspi 4 but that's probably just cost. Perhaps the A72 is a lot lot lot cheaper or maybe the vhdl is just floating around on github somewhere
Thanks for the link, very interesting indeed. A key feature from my POV is the low power cost per bit. The TSMC interconnect is not as fast as AMD's infinity fabric (8 GT/s vs 10.6 GT/s for IF), but only about a quarter of the energy per bit. And, for HPC, those picojoules per bit add up in a hurry.
Yeah, the numbers are impressive. But one of those technologies is out already and one is just in the proof of concept stages. :) I'd expect new technology to be better than the old stuff. :D
I consider an interconnect consuming about 70% less power at about 75% of the speed at least potentially better, depending on the use scenario. IF is very capable and, yes, already out, but many have pointed out that the power use by the interconnect is probably the main reason why AMD's 7 nm chips have just about pulled even with Intel's forever 14 nm on power/performance.
I think a lot of the power savings are possible because the use of a silicon interposer compared to a standard substrate for Infinity Fabric. To me CoWoS seems more like how HBM memory is connected to GPUs than Infinity Fabric.
Interesting. I guess the TDP was not reported but (due to the much higher clock than the max clock the A72 core was designed for) it must be quite high. Perhaps in the 35W - 45W range?
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jeremyshaw - Friday, September 27, 2019 - link
If I am not mistaken, this is the first 7nm A72 core. Given it's so old, my guess is this is a TSMC-lead research project, and ARM came in much later? Are than any further details on the CoWoS sandwich? Why does it have the last "oS?"name99 - Friday, September 27, 2019 - link
Chip on Wafer *on Substrate*https://en.wikichip.org/wiki/tsmc/cowos
I assume the wafer is placed on the substrate to create a package that's slightly easier to work with, the substate (I assume an organic PCB-like material) being more flexible (both mechanically, and being available as a little mini-PCB on which you can place some capacitors on inductors or whatever as required by the package)?
extide - Friday, September 27, 2019 - link
CoWoS is basically TSMC's version of an interposer.name99 - Friday, September 27, 2019 - link
Well duh.But that doesn't answer the question of why bother thinning the wafer and mounting it on substrate! That's the interesting issue, and the point I was trying to (guessing at!) answering.
anonomouse - Friday, September 27, 2019 - link
Substrate is the organic package, and it's where the technology integrates with regular packaging/mounting technologies. Plus it provides package stiffness that would definitely not exist if you tried to mount the bare interposer onto a board. And you'd still need some sort of redistribution layer from the much tighter (TSV) bumps on the backside of the interposer to a pitch that can interface with a regular motherboard.DenvR - Friday, September 27, 2019 - link
Interesting, but weird, wouldn't the A73 have been a better µarch for this project, considering the A72 was known for its high power consumption and overheating issues on mobile platforms?RSAUser - Friday, September 27, 2019 - link
It's a proof of concept, this was probably in development for a longer time.Alistair - Friday, September 27, 2019 - link
AMD style chiplet ARM CPUs incoming? Pretty neat.Raqia - Friday, September 27, 2019 - link
The A72 has a rather long 15 stage pipeline, and clock speeds like that seem more plausible for this design than A73-A77 which all have shorter pipelines. Interposers like this might be featured on the next AX chip from apple to integrate Qualcomm's modem IP which they do not have in house and can't fab on-die.Guspaz - Friday, September 27, 2019 - link
Apple bought Intel’s modem division. Why would they still be using a Qualcomm modem?guycoder - Friday, September 27, 2019 - link
Because Intel were never able to produce a viable 5G chipset and Apple had to sign a supply agreement with Qualcomm to cover the next couple of years. For the foreseeable future Apple will be using Qualcomm modems until they can fix the ex-Intel acquisition.Raqia - Friday, September 27, 2019 - link
After Apple's Intel modem unit purchase, they have enough engineers to integrate Qualcomm's solutions and new patents to help them negotiate down licensing costs, but not enough to develop their own soup-to-nuts solution in 5G. This new generation will be much more complex in RFFE interactions with the modem, and you can be sure that after their first dance with Apple, Qualcomm won't be giving them nearly as much help as they did during 4G under their collaborative work agreement over which the legal fracas initially started. (It is a testament to Apple's clout over the industry and its manufacturers that it almost pulled off what it did with Dialog, PowerVR, and GTAT with a company the size of Qualcomm, but ultimately it is also a testament to the strength of Qualcomm's IP and its lead in 5G solutions that Apple settled despite its deep war-chest and the engineering aid of the similarly deep pocketed Intel.)If Apple doubles their modem engineers and acquires an RFFE company such as Skyworks or Qorvo, then they would be getting serious about bringing an implementation in house, but it is very difficult to create a cellular implementation that is competitive with Qualcomm and rumors have it that Apple's internal timeline for such a solution is the mid 2020s (iirc 2023.) A purchase like this may come to pass as Qualcomm recently purchased their stake in their TDK 360 venture and will likely increase their content share of phones by becoming the reference design for many 5G solutions encompassing modem and RFFE, thus threatening the business of smaller RFFE companies in the next 5 years.
flgt - Friday, September 27, 2019 - link
It seems Apple would draw the line and not be bothered with an RFFE. It’s a bit of a commodity even in 5G. Skyworks and Qorvo both sell a lot of non-handset parts that Apple probably wants no part in supporting.Dragonstongue - Saturday, September 28, 2019 - link
15 stage is "kind of long" however, if both these 2 chips "talk nicely" to each other, this "real impact" might be ~10 stage or less (tandem compute .. I am call this way.. am sure there proper term .. medicine brain here not help.maybe they dd A72 as the wires etc were "easier" to work with, vs maybe one that had been "clipped" to get highest possible performance (like AMD did with Radeon 4870 to 4890 .. same thing, just clip etc wire, ramp clocks, feed slight different power...new product.
maybe this is similar, take a "4870" clip extra wires when they go to RTM so effectively becomes a 4890..same "sauce" even faster as they had time to "tweak and tune"
--------------
odd that Ryzen (going my way of thought) is/has as many issue as did/does, maybe they forgot to "clip the wires"
something along them lines......
interesting..seems this is the "future path" all compute folks MUST take as the die size goes down, will be slower but able to do more (little bit more latency)
am sure the makers of these things pull their hair out constantly till they "oh crap, that is what issue was"
Ask Intel and Nvidia ... the ones who can do no wrong as hurting something bad overall, compared to what should (this what happens when NOT pay attention to customers who keep your business alive... they must have forgot this... MSFT sure as hell has...Apple is very lost cause at this point for "consumer" ... sandwich cart service is ok for sandwich cart....not for hundreds if not millions $$$$$$$$$$ product purchase......
not your sandwich once WE bought it you fools....am I right or am I right?
TheinsanegamerN - Monday, September 30, 2019 - link
rather long 15 stage pipeline*laughs in netburst*
eastcoast_pete - Friday, September 27, 2019 - link
This is a very Interesting proof of concept, and especially attractive for situations where many cores/threads are highly desirable, and both cost and power consumption are important. Whoever gets the chiplets-on-interconnects just right is in a great position to sell many of them. If this works, ARM will make even more money for licenses, and TSMC probably doesn't mind getting lots of orders to fab the chiplets and interconnects. I wonder if "closed" shops like Anapurna (Amazon) are already developing their implementations.RSAUser - Friday, September 27, 2019 - link
It would be highly strange if they weren't as the entire industry has been trying to move in that direction for years, especially after AMD managed to pull it off so successfuly.The question now will be the who can figure out ways that will bypass patents or patent a high performance feature variation.
eastcoast_pete - Friday, September 27, 2019 - link
Doesn't have to be a bypass of the patents involved here. I see this more as a demonstration or proof-of-concept for tech that can be licensed, and maybe even at decent rates, as long as you fab them with TSMC.mappu04 - Friday, September 27, 2019 - link
Showcased in June 2019 at the VLSI Symposium Japan. You can also read wikichip coverage at https://fuse.wikichip.org/news/2446/tsmc-demonstra... .It is interesting to see so many new A72 designs in 2019, i guess TSMC likes them a lot (maybe they had a special license to the architecture?). For instance there was also the Xilinx versal, and Huawei's new 64-core thing, both A72 on TSMC in 2019.
Also the raspi 4 but that's probably just cost. Perhaps the A72 is a lot lot lot cheaper or maybe the vhdl is just floating around on github somewhere
eastcoast_pete - Friday, September 27, 2019 - link
Thanks for the link, very interesting indeed. A key feature from my POV is the low power cost per bit. The TSMC interconnect is not as fast as AMD's infinity fabric (8 GT/s vs 10.6 GT/s for IF), but only about a quarter of the energy per bit. And, for HPC, those picojoules per bit add up in a hurry.Death666Angel - Saturday, September 28, 2019 - link
Yeah, the numbers are impressive. But one of those technologies is out already and one is just in the proof of concept stages. :) I'd expect new technology to be better than the old stuff. :Deastcoast_pete - Saturday, September 28, 2019 - link
I consider an interconnect consuming about 70% less power at about 75% of the speed at least potentially better, depending on the use scenario. IF is very capable and, yes, already out, but many have pointed out that the power use by the interconnect is probably the main reason why AMD's 7 nm chips have just about pulled even with Intel's forever 14 nm on power/performance.AlexDaum - Sunday, September 29, 2019 - link
I think a lot of the power savings are possible because the use of a silicon interposer compared to a standard substrate for Infinity Fabric.To me CoWoS seems more like how HBM memory is connected to GPUs than Infinity Fabric.
Robo Jones - Friday, September 27, 2019 - link
This design makes me think Apple will use their chips in all products. All they need to drop in another A13 chiplet for a MacBook Pro or Mac Pro.Santoval - Friday, September 27, 2019 - link
Interesting. I guess the TDP was not reported but (due to the much higher clock than the max clock the A72 core was designed for) it must be quite high. Perhaps in the 35W - 45W range?ballsystemlord - Saturday, September 28, 2019 - link
Your caps lock got stuck on. :)"THe companies are hoping that now this technology is proven that its customers will take advantage of it."