Intel ships cooper lake for rev in q4 19 only to big customers just like they did with cascade lake in q4 18 but enterprise products like cisco servers get shipments in late q1 to q2. So this is not later than your previous expectations...
Ice lake is probably coming less than 12 months after cooper lake judging by the slides from the china HPC event...
You can be sure Intel platforms will support PCIe 4.0 as soon as it makes sense - it's stable and there's a choice of devices that would support/benefit. Companies are cooperating and they'll launch new products together. That's how it works.
DDR5 mass production is supposed to start early/mid 2020. It would be weird if Ice lake did not support DDR5 in addition to DDR4. I suspect most buyers will need new boards if they want DDR5 and PCIe4.
Are you kidding? Intel would *love* a chance to iterate a new chipset / CPU SKU to require you to buy a new server to get DDR5 support. Intel is *not* your friend. Don't get compliant.
I seriously doubt DDR5 is going to be in Ice Lake. The architecture at this point is sort of "old", and just waiting for the process node to be stable. Its not even clear yet if PCIe 4 is going to be included.
Intel does refreshes every 8-12 months anyway, perfect time to ship a new memory controller.
AMD might wait for 2021 before adopting DDR5. Zen 2 is a new design and is released this year (with PCIe 4.0 but not DDR5). Zen 3 will apparently be released in 2020, but as it is an optimized Zen 2 and not a new design, I highly doubt it will support DDR5 either. Even if it did though (since apparently only -or mostly- new I/O dies with DDR5 memory controllers would be required), if AMD sticks to their release of new server CPUs every odd year cadence, they are not going to release Zen 3 based server CPUs in 2020 anyway, so there would be little need to rush DDR5 adoption.
Adoption of DDR5 in 2021 with Zen 4, the next new Zen design, appears to be much more practical. 2021 is also beyond the year (2020) that AMD guaranteed backwards socket compatibility, so they will be free to adopt new sockets with more pins, more memory channels (if required, since DDR5 might not need them) and by and large design their platforms from a clean slate.
You kinda provided an argument against your own statement, didn't you? :D AMD has been very good at the chiplet thing and mixing and matching certain IP blocks (DDR3 and GDDR5 support with last consoles, Ryzen GDDR5 support with the Chinese console chip). And the IO chiplet approach points much more strongly towards them pursuing this trend. I expect Zen 3 or Zen2+ to be DDR4 and DDR5 compliant, much like a lot of current Intel CPUs support DDR4 but also LPDDR3 or something to that effect. It shouldn't add too much die area.
The chiplet design gives AMD the ability to cycle/respin the IO chiplet and suddenly have PCIe4 and DDR5 or whatever else they want without repining the CPU chiplets. It actually makes them far more agile if they choose to be. If the supporting peripherals like shipping PCIe4 cards and DDR5 memory actually starts shipping at some point.
Though both of those would require a new motherboard and associated chipset its actually probably easier for them to adjust the CPU at this point than the motherboard support.
You will need a new socket to support a new memory type. While some processors themselves can support multiple sockets(such as when AMD made the jump from DDR2 to DDR3), the new socket would need to be designed with that in mind.
For server, it would only make sense to go to DDR5 if it provides a capacity increase right out of the gate with reasonable cost. Shrinks have progressed to a snail's pace on the CPU side but DRAM may not scale below 10 nm. Recent capacity increases have been obtained via die stacking or simply throwing more chips onto a DIMM.
This is not an Intel cpu roadmap but a presentation fail. Check out page 23, it clearly says “Processor timeline and availability based on Intel disclosure to Cisco on April 2017. Subject to change.” April 2017!!!
Keep in mind that what Intel say privately in meetings to the big OEMs isn't always, or even often, what they are saying publicly to investors/conference calls and in announcements. You can get away with lying about 10nm to investors (though you shouldn't ) and making promises at CES/Computex, etc, but if you mess around with the server guys so they don't have time to prepare for your platforms then you're going to lose billions and billions in business by messing them around. Also keep in mind that based on information from April 2017, they are saying 10nm server is coming likely very end of 2020, publicly Intel was still promising 10nm would ramp throughout 2018 at the end of 2017 and that would mean desktop and server before the end of 2018. yet this business that sells servers was told in 2017 to not expect 10nm servers till at least 2 years later.
Purley didn't have a very long platform lifetime, did it? Skylake-SP and the relatively small Cascade-SP kicker. Compared to Brickland (Ivy-EX, Haswell-EX, Broadwell-EX), that's pretty underwhelming.
The former EX line up was generally good for three generations. (Sandy Bridge-EX was skipped but would have fit into the same socket at Westmere-EX).
Purely merged Intel's dual/quad EP platform with the quad/octo/more EX segment. What got skipped is Cannon Lake-SP which was pretty clear early on wouldn't make it due to 10 nm delays.
Cascade Lake is indeed a minor bump but it fixes some errata regarding Optane DIMMs. I know of a few big data people who are eager to leverage cheap (to DRAM at least) 512 GB modules in an 8 way server to attempt things like running large Hadoop data sets on a single node instead of a cluster. Even though the Optane DIMMs are going to be chronically slow compared to DRAM, they should still beat a network operation that has to jump between nodes.
There is a slim chance that Cooper Lake could still appear on socket LGA 3647 to keep various OEMs happy. This would be similar to how Intel releases the the same die between LGA 3647 and LGA 2066 today based upon market segment.
The real wild card is what will replace Cascade Lake-AP for HPC and if it'll use the same socket.
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brakdoo - Tuesday, February 5, 2019 - link
Intel ships cooper lake for rev in q4 19 only to big customers just like they did with cascade lake in q4 18 but enterprise products like cisco servers get shipments in late q1 to q2. So this is not later than your previous expectations...Ice lake is probably coming less than 12 months after cooper lake judging by the slides from the china HPC event...
IGTrading - Tuesday, February 5, 2019 - link
So there will be ZERO platforms from Intel that support PCIe 4.0 in 2019.The way I see it ... Intel will be behind #AMD Epyc on PCIe support until next year.
Do we have any information on the contrary ?
notb - Wednesday, February 6, 2019 - link
You can be sure Intel platforms will support PCIe 4.0 as soon as it makes sense - it's stable and there's a choice of devices that would support/benefit.Companies are cooperating and they'll launch new products together. That's how it works.
RSAUser - Wednesday, February 6, 2019 - link
It's already stable AFAIK.It will probably be a deciding factor in quite a lot of cases as you can already bottle neck PCIe 3.
4 Will probably be used for market segmentation by Intel as well.
Kevin G - Wednesday, February 6, 2019 - link
Well if you want to get technical, AMD is behind IBM whose first PCIe 4.0 devices started shipping in 2017.brakdoo - Tuesday, February 5, 2019 - link
DDR5 mass production is supposed to start early/mid 2020. It would be weird if Ice lake did not support DDR5 in addition to DDR4. I suspect most buyers will need new boards if they want DDR5 and PCIe4.mooninite - Tuesday, February 5, 2019 - link
Are you kidding? Intel would *love* a chance to iterate a new chipset / CPU SKU to require you to buy a new server to get DDR5 support. Intel is *not* your friend. Don't get compliant.nandnandnand - Tuesday, February 5, 2019 - link
*complacentnevcairiel - Tuesday, February 5, 2019 - link
I seriously doubt DDR5 is going to be in Ice Lake. The architecture at this point is sort of "old", and just waiting for the process node to be stable. Its not even clear yet if PCIe 4 is going to be included.Intel does refreshes every 8-12 months anyway, perfect time to ship a new memory controller.
brakdoo - Tuesday, February 5, 2019 - link
We are talking about servers here. Intel usually does not do "refreshes every 8-12 months" for servers.Santoval - Tuesday, February 5, 2019 - link
AMD might wait for 2021 before adopting DDR5. Zen 2 is a new design and is released this year (with PCIe 4.0 but not DDR5). Zen 3 will apparently be released in 2020, but as it is an optimized Zen 2 and not a new design, I highly doubt it will support DDR5 either. Even if it did though (since apparently only -or mostly- new I/O dies with DDR5 memory controllers would be required), if AMD sticks to their release of new server CPUs every odd year cadence, they are not going to release Zen 3 based server CPUs in 2020 anyway, so there would be little need to rush DDR5 adoption.Adoption of DDR5 in 2021 with Zen 4, the next new Zen design, appears to be much more practical. 2021 is also beyond the year (2020) that AMD guaranteed backwards socket compatibility, so they will be free to adopt new sockets with more pins, more memory channels (if required, since DDR5 might not need them) and by and large design their platforms from a clean slate.
Death666Angel - Tuesday, February 5, 2019 - link
You kinda provided an argument against your own statement, didn't you? :D AMD has been very good at the chiplet thing and mixing and matching certain IP blocks (DDR3 and GDDR5 support with last consoles, Ryzen GDDR5 support with the Chinese console chip). And the IO chiplet approach points much more strongly towards them pursuing this trend. I expect Zen 3 or Zen2+ to be DDR4 and DDR5 compliant, much like a lot of current Intel CPUs support DDR4 but also LPDDR3 or something to that effect. It shouldn't add too much die area.rahvin - Wednesday, February 6, 2019 - link
The chiplet design gives AMD the ability to cycle/respin the IO chiplet and suddenly have PCIe4 and DDR5 or whatever else they want without repining the CPU chiplets. It actually makes them far more agile if they choose to be. If the supporting peripherals like shipping PCIe4 cards and DDR5 memory actually starts shipping at some point.Though both of those would require a new motherboard and associated chipset its actually probably easier for them to adjust the CPU at this point than the motherboard support.
Targon - Wednesday, February 6, 2019 - link
You will need a new socket to support a new memory type. While some processors themselves can support multiple sockets(such as when AMD made the jump from DDR2 to DDR3), the new socket would need to be designed with that in mind.Kevin G - Wednesday, February 6, 2019 - link
For server, it would only make sense to go to DDR5 if it provides a capacity increase right out of the gate with reasonable cost. Shrinks have progressed to a snail's pace on the CPU side but DRAM may not scale below 10 nm. Recent capacity increases have been obtained via die stacking or simply throwing more chips onto a DIMM.GreenReaper - Tuesday, February 5, 2019 - link
A copper lake would have been cooler - pair it with an ice lake reservoir and you could OC to the moon!Lord 666 - Tuesday, February 5, 2019 - link
This is not an Intel cpu roadmap but a presentation fail. Check out page 23, it clearly says “Processor timeline and availability based on Intel disclosure to Cisco on April 2017. Subject to change.” April 2017!!!drunkenmaster - Wednesday, February 6, 2019 - link
Keep in mind that what Intel say privately in meetings to the big OEMs isn't always, or even often, what they are saying publicly to investors/conference calls and in announcements. You can get away with lying about 10nm to investors (though you shouldn't ) and making promises at CES/Computex, etc, but if you mess around with the server guys so they don't have time to prepare for your platforms then you're going to lose billions and billions in business by messing them around. Also keep in mind that based on information from April 2017, they are saying 10nm server is coming likely very end of 2020, publicly Intel was still promising 10nm would ramp throughout 2018 at the end of 2017 and that would mean desktop and server before the end of 2018. yet this business that sells servers was told in 2017 to not expect 10nm servers till at least 2 years later.JlHADJOE - Wednesday, February 6, 2019 - link
Man even Ice Lake is *still* DDR4? Was hoping to hold off on upgrades till DDR5 but it seems like it's still a long way till launch.SarahKerrigan - Wednesday, February 6, 2019 - link
Purley didn't have a very long platform lifetime, did it? Skylake-SP and the relatively small Cascade-SP kicker. Compared to Brickland (Ivy-EX, Haswell-EX, Broadwell-EX), that's pretty underwhelming.Kevin G - Wednesday, February 6, 2019 - link
The former EX line up was generally good for three generations. (Sandy Bridge-EX was skipped but would have fit into the same socket at Westmere-EX).Purely merged Intel's dual/quad EP platform with the quad/octo/more EX segment. What got skipped is Cannon Lake-SP which was pretty clear early on wouldn't make it due to 10 nm delays.
Cascade Lake is indeed a minor bump but it fixes some errata regarding Optane DIMMs. I know of a few big data people who are eager to leverage cheap (to DRAM at least) 512 GB modules in an 8 way server to attempt things like running large Hadoop data sets on a single node instead of a cluster. Even though the Optane DIMMs are going to be chronically slow compared to DRAM, they should still beat a network operation that has to jump between nodes.
There is a slim chance that Cooper Lake could still appear on socket LGA 3647 to keep various OEMs happy. This would be similar to how Intel releases the the same die between LGA 3647 and LGA 2066 today based upon market segment.
The real wild card is what will replace Cascade Lake-AP for HPC and if it'll use the same socket.