What strikes me as interesting here is the pace of improvement. Mock Huawei all you like, but (like Apple) they are clearly on a schedule that targets serious meaningful improvement and innovation every year.
How does Intel, purveyor of essentially the same system today as in 2015, expect this to end in the long run? Admittedly Huawei can't create cute code names as rapidly as Intel, but I suspect customers will care less about that than about these other improvements. Sure, like Apple, TODAY these systems are for Huawei internal use. But things change...
What strikes me as interesting here is how deeply in bed ARM seems to have been with Huawei. Much of this tech, like Ares and CCIX, is stuff Huawei is probably getting from ARM - not building on its own.
Are there any non-Chinese partners currently using their Ares cores?
> How does Intel, purveyor of essentially the same system today as in 2015
How can you say that? Beyond things like Skylake SP and Xeon Phi (which, although it's being wound down, is a testament to their attempts to adapt), they're working on dGPUs, a few lines of deep learning chips, and different integrations of FPGAs. Not to mention Optane.
About the only thing you can't accuse Intel of doing, lately, is resting on their laurels. They seem as aware as anyone of what they stand to lose. You can fault their execution in several areas, but I don't think you can seriously accuse them of complacency.
Intel is the absolute archetype of modern-day corporate complacency. They thought they had microprocessing sown up, slashed R&D, and failed to see what was coming at them full steam.
Do you really think a few FGPAs and a niche memory type will make up for the loss of their CPU business?
Diversification can help a company weather through a storm that takes out their cash crop. In the case of Intel, yes, FPGA and Optane can help the company weather the CPU threat in the server area from AMD, ARM and IBM/nVidia. What is worrisome is that Optane DIMMs are late (supposed to launch alongside Sky Lake-SP but delayed due to errata). Their FGPA road inherited from Altera has been steady with the exception of the combo Xeon + FPGA parts. There is the Gold 6138P and some prototypes floating around under NDA. The idea of putting an FPGA into a Xeon package predates Intel buying Altera. Cascade Lake and Intel finally pushing out 10 nm chips in volume will address these two concerns this year.
Intel also has their Nervena accelerators coming this year can be another pillar to support the company when during the increased time of CPU competition.
What is "raw performance"? Adding 2 AVX (or NEON for ARM) registers to each other on 64 cores in a loop gives you one performance, real life usually something 100 times lower, simply because to do anything actually useful it needs to read and write memory (and fight starts on 1st shared cache actually, not even memory), and mostly in patterns very different from what those vector instructions suppose...
We’ve updated our terms. By continuing to use the site and/or by logging into your account, you agree to the Site’s updated Terms of Use and Privacy Policy.
Facebook
Twitter
RSS
11 Comments
Back to Article
abufrejoval - Tuesday, November 20, 2018 - link
Wow! Sure makes the EU processor seem like a late phantom d'opera...name99 - Tuesday, November 20, 2018 - link
What strikes me as interesting here is the pace of improvement. Mock Huawei all you like, but (like Apple) they are clearly on a schedule that targets serious meaningful improvement and innovation every year.How does Intel, purveyor of essentially the same system today as in 2015, expect this to end in the long run? Admittedly Huawei can't create cute code names as rapidly as Intel, but I suspect customers will care less about that than about these other improvements. Sure, like Apple, TODAY these systems are for Huawei internal use. But things change...
mode_13h - Wednesday, November 21, 2018 - link
What strikes me as interesting here is how deeply in bed ARM seems to have been with Huawei. Much of this tech, like Ares and CCIX, is stuff Huawei is probably getting from ARM - not building on its own.Are there any non-Chinese partners currently using their Ares cores?
> How does Intel, purveyor of essentially the same system today as in 2015
How can you say that? Beyond things like Skylake SP and Xeon Phi (which, although it's being wound down, is a testament to their attempts to adapt), they're working on dGPUs, a few lines of deep learning chips, and different integrations of FPGAs. Not to mention Optane.
About the only thing you can't accuse Intel of doing, lately, is resting on their laurels. They seem as aware as anyone of what they stand to lose. You can fault their execution in several areas, but I don't think you can seriously accuse them of complacency.
Death666Angel - Wednesday, November 21, 2018 - link
Paranoid much?mode_13h - Friday, November 23, 2018 - link
WTF?Meteor2 - Monday, November 26, 2018 - link
Intel is the absolute archetype of modern-day corporate complacency. They thought they had microprocessing sown up, slashed R&D, and failed to see what was coming at them full steam.Do you really think a few FGPAs and a niche memory type will make up for the loss of their CPU business?
Kevin G - Monday, January 7, 2019 - link
Diversification can help a company weather through a storm that takes out their cash crop. In the case of Intel, yes, FPGA and Optane can help the company weather the CPU threat in the server area from AMD, ARM and IBM/nVidia. What is worrisome is that Optane DIMMs are late (supposed to launch alongside Sky Lake-SP but delayed due to errata). Their FGPA road inherited from Altera has been steady with the exception of the combo Xeon + FPGA parts. There is the Gold 6138P and some prototypes floating around under NDA. The idea of putting an FPGA into a Xeon package predates Intel buying Altera. Cascade Lake and Intel finally pushing out 10 nm chips in volume will address these two concerns this year.Intel also has their Nervena accelerators coming this year can be another pillar to support the company when during the increased time of CPU competition.
peevee - Wednesday, November 21, 2018 - link
"Arm core with Skylake-levels of raw performance"What is "raw performance"? Adding 2 AVX (or NEON for ARM) registers to each other on 64 cores in a loop gives you one performance, real life usually something 100 times lower, simply because to do anything actually useful it needs to read and write memory (and fight starts on 1st shared cache actually, not even memory), and mostly in patterns very different from what those vector instructions suppose...