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  • SydneyBlue120d - Wednesday, April 11, 2018 - link

    Can we expect the new chip to be used inside Kirin 980 toward the end of the year in the Huawei Mate 20 Pro?
  • Andrei Frumusanu - Wednesday, April 11, 2018 - link

    There's no confirmation on this, but it's somewhat reasonable to assume.
  • ZolaIII - Wednesday, April 11, 2018 - link

    I seriously doubt it given how much time it needs to bring new IP to silicon & when Kirin 980 is expected. So first implementation out in the wild will be in at least one year.
  • SydneyBlue120d - Thursday, April 12, 2018 - link

    Tensilica Vision P6 has been announced in May 2, 2016, while the Kirin 970 has been announced in September 1, 2017, so You may be wright, we'll see if this time they will be faster :)
  • vladx - Monday, April 16, 2018 - link

    A bit too late for that, more likely that Kirin 980 will just add more Vision P6 cores to increase performance thanks to being fabbed on 10nm instead of 16nm.
  • Threska - Wednesday, April 11, 2018 - link

    What would be nice is if all this capability would be accessible when the camera isn't being used.
  • Wardrive86 - Wednesday, April 11, 2018 - link

    I'm assuming developers have access to the DSP??
  • conductionband - Wednesday, April 11, 2018 - link

    iFixit's P20 Pro teardown showed all three camera modules had OIS hardware. It appears that Huawei is being a bit cagey promoting their "AIS" while hardware OIS is in use.
  • Andrei Frumusanu - Wednesday, April 11, 2018 - link

    All that that tear-down showed is that the modules have an auto-focus mechanism. Just because the lens wobbles doesn't mean it's OIS.
  • jjj - Wednesday, April 11, 2018 - link

    Earlier today I was thinking that I haven't seen results for SD845 in Master Lu.
    Are you gonna test ML/DL accelerators on a regular basis? And maybe list specs and what's the metric., TOPs or GMAC or both?
  • Andrei Frumusanu - Wednesday, April 11, 2018 - link

    The S9 doesn't seem to have a working SNPE backend/ Master Lu isn't running correctly and falling back to the CPU, that's why I didn't cover it.

    The plan is to test them yes, but currently the available benchmarks... are lacking.
  • jjj - Wednesday, April 11, 2018 - link

    Thanks.
    I know it's messy, it always is in the early days but marketing is starting to focus on AI and we need to know what's what.
  • Wardrive86 - Wednesday, April 11, 2018 - link

    Thanks for the article! Hope to see more companies discuss their DSPs in detail
  • Wardrive86 - Wednesday, April 11, 2018 - link

    Sorry for the double post. Can a developer have access to the DSP via OpenCL, Renderscript, OpenGLES, or Vulkan?
  • ZolaIII - Wednesday, April 11, 2018 - link

    No they use their own lo level API's from Kronos.
    https://image.slidesharecdn.com/13embeddedvisional...
  • jjj - Wednesday, April 11, 2018 - link

    In theory this can apply effects to video in real time , wonder if mitigating rolling shutter issues is something folks might try to address.
  • serendip - Wednesday, April 11, 2018 - link

    Does Qualcomm have something similar with their Hexagon DSPs? I imagine it wouldn't be hard to add a neural network block in there, the main issue is if it's accessible to the user.
  • SydneyBlue120d - Thursday, April 12, 2018 - link

    Yes, they have:
    https://semiaccurate.com/2017/12/18/qualcomms-ai-u...
  • tuxRoller - Thursday, April 12, 2018 - link

    This isn't a vliw design? That's an interesting way to go for a dsp.
  • Tom Womack - Tuesday, April 17, 2018 - link

    Cadence is, famously, a manufacturer of EDA software.

    Are the ranges of IP blocks produced by EDA companies generally tied in to their EDA software, or can you use a Tensilica DSP and a Synopsys ARC processor in a design which you are compiling using Mentor tools?

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