The graph is in log-scale, such that the improvement from 1 to 5 (5 fold) has equal distance as the improvement from 5 to 25 (5 fold). Its the only scale that makes sense.
Yeah, not sure why the author just gets through saying "they've done 5x, and they've got another 5x to go", then says the graph looks wrong for showing halfway?! Another 5x *from here* will do it.
Why not? Look at the difference between a mobile Pentium 4 and a mobile Kaby Lake CPU in power consumption for a given unit of compute performance. The trouble for AMD in improvement is more the number of years remaining until they have to deliver. As long as the production process can be improved, AMD's 25x20 goal isn't totally unreasonable, but even if it doesn't happen by 2020, there'll be some point in the future where we're enjoying 25x more performance per watt than we were in 2014. Competitive market forces make that pretty much inevitable.
Because you are comparing two extreme situation. Pentium 4 was never designed with with minimal power consumption in mind, in fact it was quite the opposite, Ghz = Power. And its node was also not for Mobile usage. While Kaby is designed with Mobile CPU in mind along with Low Power node.
Then compare a Core 2 Duo with a Kaby Lake CPU if it bothers you that much or use a Cyrix Media GXm. Whatever floats your nitpicky boat is fine with me. I'm not interested in having a nerd slap-and-hair-pull fight with someone that wants to argue against reality for the sake of being absurdly stubborn.
Yep 25x is definitely possible before the end of 2020. If they covered 5.86x in the first three years then that leaves another 4.27x to put them past their 25x goal over the next 3 years. So, 12nm LPP for 2018, 7nm for 2019, and 7nm+ in 2020 plus architectural improvements should do it.
LPDDR3 isn't a clear win over DDR4. LPDDR3 draws several times less power in idle than DDR4, however DDR4 draws 20% less power when active. This image from Samsung shows this: http://i.imgur.com/AVjraML.png.
Thing is - a typical laptop is idle >95% of the time ;-)
I don't know exactly what the amount of RAM activity is when you are, say, typing a comment in browser but I'd be willing to bet it isn't so much that LPDDR3 uses more power than DDR4.
The TSMC Roadmap: ( I remember posting this Anandtech Forum and people were calling me crazy....... ) 2018 - 7nm 2019 - 7nm + 2020 - 5nm
GF runs a similar schedule. So we may see 5nm from GF in 2020 as well. ( Yes this 5nm is different from Intel's 5nm )
That is a jump from 14nm > 12nm > 7nm > 7nm+ / EUV > 5nm
Roughly 4x the density. Along with some other improvement that should scale well on the GPU performance side.
If we just simply it to have 5x *Multithread* Cinebench and Graphics performance within the same power budget in 5 years time. This doesn't look too difficult, they have chosen a benchmark for performance that scales very nicely with more transistor.
"That’s a steep hill to climb, and it is clear that the scale of the graph above seems to be wrong, with Ryzen Mobile being half-way up the graph, rather than around 20% up the graph."
*sigh*
Of all the editors here, I'd've expected you to be able to identify a log scale plot even with an unlabeled axis. Something where exponential growth would be expected showing as a fixed slope should have been a dead giveaway.
*My opinion* is that log scale is fair because most things related to silicon scale exponentially. Some thing event scale a mixture of exponential and quadratic with something like O(2^N*M^2). Of course (2^N) wins in the long run, but you see the scaling going faster than (2^N) on its own.
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junky77 - Thursday, October 26, 2017 - link
The twitter poll shortcode doesn't workMajGenRelativity - Thursday, October 26, 2017 - link
Well, higher efficiency is always good. It's interesting to see where AMD will go.jonnyFlash - Thursday, October 26, 2017 - link
The graph is in log-scale, such that the improvement from 1 to 5 (5 fold) has equal distance as the improvement from 5 to 25 (5 fold). Its the only scale that makes sense.ABR - Thursday, October 26, 2017 - link
Yeah, not sure why the author just gets through saying "they've done 5x, and they've got another 5x to go", then says the graph looks wrong for showing halfway?! Another 5x *from here* will do it.peevee - Thursday, October 26, 2017 - link
There is no way they reduce power by 4x (0.44/0.11) while keeping the same or better performance.BrokenCrayons - Thursday, October 26, 2017 - link
Why not? Look at the difference between a mobile Pentium 4 and a mobile Kaby Lake CPU in power consumption for a given unit of compute performance. The trouble for AMD in improvement is more the number of years remaining until they have to deliver. As long as the production process can be improved, AMD's 25x20 goal isn't totally unreasonable, but even if it doesn't happen by 2020, there'll be some point in the future where we're enjoying 25x more performance per watt than we were in 2014. Competitive market forces make that pretty much inevitable.iwod - Thursday, October 26, 2017 - link
Because you are comparing two extreme situation. Pentium 4 was never designed with with minimal power consumption in mind, in fact it was quite the opposite, Ghz = Power. And its node was also not for Mobile usage. While Kaby is designed with Mobile CPU in mind along with Low Power node.BrokenCrayons - Thursday, October 26, 2017 - link
Then compare a Core 2 Duo with a Kaby Lake CPU if it bothers you that much or use a Cyrix Media GXm. Whatever floats your nitpicky boat is fine with me. I'm not interested in having a nerd slap-and-hair-pull fight with someone that wants to argue against reality for the sake of being absurdly stubborn.Kamen75 - Thursday, October 26, 2017 - link
Yep 25x is definitely possible before the end of 2020. If they covered 5.86x in the first three years then that leaves another 4.27x to put them past their 25x goal over the next 3 years. So, 12nm LPP for 2018, 7nm for 2019, and 7nm+ in 2020 plus architectural improvements should do it.lefty2 - Thursday, October 26, 2017 - link
LPDDR3 isn't a clear win over DDR4.LPDDR3 draws several times less power in idle than DDR4, however DDR4 draws 20% less power when active. This image from Samsung shows this: http://i.imgur.com/AVjraML.png.
jospoortvliet - Saturday, October 28, 2017 - link
Thing is - a typical laptop is idle >95% of the time ;-)I don't know exactly what the amount of RAM activity is when you are, say, typing a comment in browser but I'd be willing to bet it isn't so much that LPDDR3 uses more power than DDR4.
iwod - Thursday, October 26, 2017 - link
The TSMC Roadmap: ( I remember posting this Anandtech Forum and people were calling me crazy....... )2018 - 7nm
2019 - 7nm +
2020 - 5nm
GF runs a similar schedule. So we may see 5nm from GF in 2020 as well. ( Yes this 5nm is different from Intel's 5nm )
That is a jump from 14nm > 12nm > 7nm > 7nm+ / EUV > 5nm
Roughly 4x the density. Along with some other improvement that should scale well on the GPU performance side.
If we just simply it to have 5x *Multithread* Cinebench and Graphics performance within the same power budget in 5 years time. This doesn't look too difficult, they have chosen a benchmark for performance that scales very nicely with more transistor.
nevcairiel - Friday, October 27, 2017 - link
Even if the foundry plans for 5nm in 2020, you won't have shipping products yet.DanNeely - Thursday, October 26, 2017 - link
"That’s a steep hill to climb, and it is clear that the scale of the graph above seems to be wrong, with Ryzen Mobile being half-way up the graph, rather than around 20% up the graph."*sigh*
Of all the editors here, I'd've expected you to be able to identify a log scale plot even with an unlabeled axis. Something where exponential growth would be expected showing as a fixed slope should have been a dead giveaway.
Ian Cutress - Thursday, October 26, 2017 - link
Sorry to disappoint. I was finishing it up at 6am...vladx - Thursday, October 26, 2017 - link
The "Half Power" scenario seems most likely looking at future improvements in fab node.ikjadoon - Thursday, October 26, 2017 - link
Minor typo:To calculate C, we have to go to the Energy Star documents and pull out this long equation:
Should read "To calculate E...", no?
ikjadoon - Thursday, October 26, 2017 - link
And that's why everyone says, "Label your axes."I think logarithmic is not a fair representation, given that the first 5x improvement is much easier than the 2nd "5x".
bcronce - Friday, October 27, 2017 - link
*My opinion* is that log scale is fair because most things related to silicon scale exponentially. Some thing event scale a mixture of exponential and quadratic with something like O(2^N*M^2). Of course (2^N) wins in the long run, but you see the scaling going faster than (2^N) on its own.Ramman.K - Thursday, October 26, 2017 - link
Was there any information about upcoming mobile CPUs for workhorse laptops (think XPS15 cores/performance) ???