It resembles much GloFo 12nm. The area reduction over 14nm is negligible, the speedup very likely between 5 and 10% on high power SKUs......my bet is on single digit. High power devices always gain less clock speed in the node change.
I mean, they are on a second gen 10nm, but we can just move 14nm designs to 10nm?
I feel like I'm missing something. Does this 11nm "halfway" point make it THAT much easier to upgrade a 14nm design? I know design costs have been going up.
No, 14 nm, 11 nm, 10 nm and 8 nm are or will be using DUV. Samsung will start manufacturing with EUV during 7 nm. So no, it is not relevant.
It seems 10 nm is still not mature enough for bigger chips, these will be produced using 14 nm or 11 nm. This way 11 nm process node seems like worth considering option.
11nm is in response to TSMC's 12nm and 11 is lower than 12 so LOL. The naming schemes are getting out of hand and Samsung is just spamming with versions of their process. They went with EUV at 7nm and that means it's rather late so TSMC got all the wins and now Samsung is just going nuts and confusing everybody.
I get that 11nm is less than 12nm and there are marketing considerations for that.
But Samsung could've just refreshed their 14nm and called it 11nm, similar to how the other 12nm processes turned out. But this 11nm seems like it's a slightly bigger deal than that.
It seems to make sense that 11LPP would avoid using triple-patterning which is required at 10LPE/LPP. This alone would make it worth it as a dedicated process for cost-sensitive applications.
Yes, that would make more sense, as that would match what GlobalFoundries are doing with their 12nm, which achieves similar density and performance gains as this 11nm Samsung process by tightening the 14nm process metrics.
However, that doesn't mean that Samsung's 11nm process isn't just a slightly relaxed 10nm process, perhaps with fewer 10nm metal layers than the full-fat 10nm process, which would reduce costs somewhat, whilst reducing achieved density.
The 10 nm BEOL claim comes from Samsung Foundry. We are still investigating other peculiarities of the technology, but Samsung makes it clear that the 11LPP is not another 20nm BEOL-based process technology.
I have seen a few done by engineers but the comparisons vary based on what you compare as some processes tend to make desnor simpler things like SRAM and some processes tend to made denser complex things like CPU. It's a difficult idea to try to predict the end result from process specifications.
"Although the SS and TSMC 10nm processes are denser than Intel's 14nm process, they are closer to Intel's 14nm process in density than they are to Intel's 10nm process."
So here is concern, Intel process has 100 million transistors at 10nm - while TSMC 10nm is 60 million - so both manufactures claim 10nm - when actually transistors are vastly different. It obvious that technology Intel is more advance and likely key reason for delays
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Gondalf - Friday, September 29, 2017 - link
It resembles much GloFo 12nm. The area reduction over 14nm is negligible, the speedup very likely between 5 and 10% on high power SKUs......my bet is on single digit.High power devices always gain less clock speed in the node change.
ImSpartacus - Friday, September 29, 2017 - link
What, so why can't we just move to 10nm?I mean, they are on a second gen 10nm, but we can just move 14nm designs to 10nm?
I feel like I'm missing something. Does this 11nm "halfway" point make it THAT much easier to upgrade a 14nm design? I know design costs have been going up.
jjj - Friday, September 29, 2017 - link
The entire point with 8nm is that it's not using EUV,ImSpartacus - Friday, September 29, 2017 - link
I get that EUV is a big deal, but it's that relevant here? I mean, Samsung's 10nm and 14nm aren't using EUV, right?Tabalan - Friday, September 29, 2017 - link
No, 14 nm, 11 nm, 10 nm and 8 nm are or will be using DUV. Samsung will start manufacturing with EUV during 7 nm. So no, it is not relevant.It seems 10 nm is still not mature enough for bigger chips, these will be produced using 14 nm or 11 nm. This way 11 nm process node seems like worth considering option.
jjj - Friday, September 29, 2017 - link
My post wasn't intended as a reply to yours.11nm is in response to TSMC's 12nm and 11 is lower than 12 so LOL.
The naming schemes are getting out of hand and Samsung is just spamming with versions of their process.
They went with EUV at 7nm and that means it's rather late so TSMC got all the wins and now Samsung is just going nuts and confusing everybody.
ImSpartacus - Sunday, October 1, 2017 - link
I get that 11nm is less than 12nm and there are marketing considerations for that.But Samsung could've just refreshed their 14nm and called it 11nm, similar to how the other 12nm processes turned out. But this 11nm seems like it's a slightly bigger deal than that.
Andrei Frumusanu - Saturday, September 30, 2017 - link
It seems to make sense that 11LPP would avoid using triple-patterning which is required at 10LPE/LPP. This alone would make it worth it as a dedicated process for cost-sensitive applications.ImSpartacus - Sunday, October 1, 2017 - link
This article was posted on Reddit and one user claimed that 11nm will not use the 10nm BEOL, being more of just a rebranded optimization of 14nm.https://www.reddit.com/r/hardware/comments/73nikw/...
Honestly, this seems more plausible to me.
Any comments?
psychobriggsy - Monday, October 2, 2017 - link
Yes, that would make more sense, as that would match what GlobalFoundries are doing with their 12nm, which achieves similar density and performance gains as this 11nm Samsung process by tightening the 14nm process metrics.However, that doesn't mean that Samsung's 11nm process isn't just a slightly relaxed 10nm process, perhaps with fewer 10nm metal layers than the full-fat 10nm process, which would reduce costs somewhat, whilst reducing achieved density.
Anton Shilov - Thursday, October 5, 2017 - link
The 10 nm BEOL claim comes from Samsung Foundry.We are still investigating other peculiarities of the technology, but Samsung makes it clear that the 11LPP is not another 20nm BEOL-based process technology.
saayeee - Tuesday, October 3, 2017 - link
Thanks! this makes more sense.saratoga4 - Saturday, September 30, 2017 - link
>I mean, they are on a second gen 10nm, but we can just move 14nm designs to 10nm?Yes, provided you can afford it. For budget parts, slightly lower performance may be a small price to pay for cost savings and higher yields.
HStewart - Friday, September 29, 2017 - link
I would like a comparison of technology - include transistor count per square area.FreckledTrout - Friday, September 29, 2017 - link
I have seen a few done by engineers but the comparisons vary based on what you compare as some processes tend to make desnor simpler things like SRAM and some processes tend to made denser complex things like CPU. It's a difficult idea to try to predict the end result from process specifications.Ian Cutress - Friday, September 29, 2017 - link
Something like this, but with processes labeled I'd imagine.Check out @IanCutress’s https://twitter.com/IanCutress/status/899412301274...
Wilco1 - Saturday, September 30, 2017 - link
That graph seems quite incorrect - 10nm TSMC is already at 60 million transistors per mm^2, 7nm will be 116 (https://www.semiwiki.com/forum/content/6713-14nm-1...Also interesting is the standard node comparison: https://www.semiwiki.com/forum/content/6895-standa... (although those graphs don't show the 10nm delays for Intel).
Lord-Bryan - Saturday, September 30, 2017 - link
Is the first link a paywalled article?saratoga4 - Saturday, September 30, 2017 - link
No, just the forums software ate the link. Try this:https://www.semiwiki.com/forum/content/6713-14nm-1...
Lord-Bryan - Sunday, October 1, 2017 - link
ThanksHStewart - Friday, October 6, 2017 - link
Key statement in that article is the following"Although the SS and TSMC 10nm processes are denser than Intel's 14nm process, they are closer to Intel's 14nm process in density than they are to Intel's 10nm process."
HStewart - Friday, October 6, 2017 - link
So here is concern, Intel process has 100 million transistors at 10nm - while TSMC 10nm is 60 million - so both manufactures claim 10nm - when actually transistors are vastly different. It obvious that technology Intel is more advance and likely key reason for delays