"It does give a transistor density of 55 million transistors per square mm, which is double what we see on AMD’s Ryzen CPU (25m per mm2) on 16FF+ vs 10nm."
AMD's Ryzen is built on GlobalFoundries' 14LPP, not TSMC's 16FF+.
Dunno much about these areas, but if I'm recalling high school math right, I think there are 6.3M times more scalar multiplies in a 128x128 matrix multiply (like Google's TPU does) than in a 3x3 one. (A dot product for each position in the output matrix, so 128**3/3**3.) It's not that TPUs were for training, either; as I understand it they were for executing already-trained networks.
FP16 3x3 matrix stuff makes me of convolutional image filters, particularly since a lot of the focus in the chip is on image processing. Maybe this is mostly exposing and slickly rebranding hardware they had anyway for the ISP and other traditional graphics stuff? Of course, if it turns out they've pulled something useful out of that I'll be impressed anyway.
"It does give a transistor density of 55 million transistors per square mm, which is double what we see on AMD’s Ryzen CPU (25m per mm2) on GloFo 14nm vs TSMC 10nm." Not bad at all. I thought TSMC 10nm had roughly the same transistor density as Intel 14nm (which has 37.5 million transistors per mm^2, with Intel 10nm having reached 100.8 million per mm^2), but it is more likely equivalent to an Intel ~13nm process. As for GloFo, if they managed to quadruple their transistor density in their 7nm node (as the 14 --> 7nm transition implies) it would almost precisely match that of Intel 10nm's, but I highly doubt they will - thought I hope they do. At most I expect they will manage a 3x transistor density, i.e. around 75 million transistors per mm^2.
"riding on the back of the not-announced then announced"
Products are commonly characterized as 'not-announced' prior to announcement, and 'announced' afterwards. However, convention notwithstanding, thanks for clarifying that this is indeed the case in this instance; it's comforting to know some things still work as expected, in the topsy turvey hoi poloy everyday rat-race zeitgeist of out current modern paradigm that we call 'life'.
I shall approach the rest of my week with renewed vigour and fortification, maybe even zeal*.
Disclaimer: I live in New Zealand, which complicates matters.
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SydneyBlue120d - Monday, September 4, 2017 - link
Are memory, interconnect and ISP inverted in the chart?jjj - Monday, September 4, 2017 - link
It was public info that they use Cambricon.BTW there is also NovuMind trying to do AI at the edge.http://www.eetimes.com/document.asp?doc_id=1332226
Infy2 - Monday, September 4, 2017 - link
Hopefully with Mate 10 Huawei would finally to pay some attention to display calibration.ToTTenTranz - Monday, September 4, 2017 - link
"It does give a transistor density of 55 million transistors per square mm, which is double what we see on AMD’s Ryzen CPU (25m per mm2) on 16FF+ vs 10nm."AMD's Ryzen is built on GlobalFoundries' 14LPP, not TSMC's 16FF+.
boozed - Monday, September 4, 2017 - link
"Kirin 970 PCB [sic] vs Intel Core i7 Laptop Sticker"A little help for those of us who don't have any Intel Core i7 Laptop Stickers handy...
Drumsticks - Tuesday, September 5, 2017 - link
This sounds like an interesting SoC. Huawei's phones are generally available overseas, right?Also, very very minor correction: a Tensor core in GV100 does 4x4x4 matrix multiplication, not 4x4.
twotwotwo - Tuesday, September 5, 2017 - link
Dunno much about these areas, but if I'm recalling high school math right, I think there are 6.3M times more scalar multiplies in a 128x128 matrix multiply (like Google's TPU does) than in a 3x3 one. (A dot product for each position in the output matrix, so 128**3/3**3.) It's not that TPUs were for training, either; as I understand it they were for executing already-trained networks.FP16 3x3 matrix stuff makes me of convolutional image filters, particularly since a lot of the focus in the chip is on image processing. Maybe this is mostly exposing and slickly rebranding hardware they had anyway for the ISP and other traditional graphics stuff? Of course, if it turns out they've pulled something useful out of that I'll be impressed anyway.
twotwotwo - Tuesday, September 5, 2017 - link
Sorry, 77K not 6.3M! Sigh.Santoval - Wednesday, September 6, 2017 - link
"It does give a transistor density of 55 million transistors per square mm, which is double what we see on AMD’s Ryzen CPU (25m per mm2) on GloFo 14nm vs TSMC 10nm."Not bad at all. I thought TSMC 10nm had roughly the same transistor density as Intel 14nm (which has 37.5 million transistors per mm^2, with Intel 10nm having reached 100.8 million per mm^2), but it is more likely equivalent to an Intel ~13nm process. As for GloFo, if they managed to quadruple their transistor density in their 7nm node (as the 14 --> 7nm transition implies) it would almost precisely match that of Intel 10nm's, but I highly doubt they will - thought I hope they do. At most I expect they will manage a 3x transistor density, i.e. around 75 million transistors per mm^2.
Soundgardener - Thursday, September 14, 2017 - link
"riding on the back of the not-announced then announced"Products are commonly characterized as 'not-announced' prior to announcement, and 'announced' afterwards. However, convention notwithstanding, thanks for clarifying that this is indeed the case in this instance; it's comforting to know some things still work as expected, in the topsy turvey hoi poloy everyday rat-race zeitgeist of out current modern paradigm that we call 'life'.
I shall approach the rest of my week with renewed vigour and fortification, maybe even zeal*.
Disclaimer: I live in New Zealand, which complicates matters.
anhnam288 - Tuesday, September 26, 2017 - link
The Huawei has taken the market by storm. The new Mate 10 and Mate 10 Pro will be key devices to watch out this year. I Like itAlexx1 - Thursday, August 9, 2018 - link
I also use hauawei p8 lite. Its nice no hanging problem. <a href="http://assignmentnotes.co.uk/assignment.html/"... notes</a>