Given the MT showings of Ryzen, and the relatively lower price, this should wipe the floor with Intel in the server segment in density, performance AND efficiency. I really hope this takes off for AMD. This market is in dire need of solid competition.
128 pcie lanes, that sounds like my kind of toy. Meanwhile, top end xeons come with only 32.
128 lanes also means that at least by design ryzen outta have 32 rather than the announced 24 lanes. 8 lanes either disabled or reserved for system use?
They say in dual socket each chip loses half the pcie lanes, but I assume just because they need the pins for infinity fabric, rather than actually using pcie for socket to socket transfers, the pcie protocol isn't optimal for that task even if bandiwdth is plenty, those pins can be better utilized in multi socket systems.
Ryzen might suffer a bit in single threaded performance, but that is only because the architecture is optimized from the ground up for HPC and server in mind. It will make a great server chip, which is a smart move by AMD, seeing the kind of margins that market has compared to desktop. Ryzen is already great for content creation workstations, the only minor complaint being the pcie lane count, and the lack of ecc memory support, and Naples solves those two.
I assume pricing will be very nice too, because that's what they did in desktop, and in servers it will be even easier to massively undercut intel, because their server chips are even-more-ridiculously-overpriced. And amd needs to steal server market badly, so it can sell as many of those cores at much higher prices than they would in desktop.
A xeon E7-8890 v4 costs the whooping 7400$. A top end Naples will easily wipe the floor with it, and seeing how it is merely 4 500$ Ryzen dies slapped together, I would not be surprised to see that chip retailing at around 3000$.
"128 lanes also means that at least by design ryzen outta have 32 rather than the announced 24 lanes. 8 lanes either disabled or reserved for system use?"
This doesn't necessarily follow, while similar overall tinkering around the edges on common blocks is common. It's possible the extra PCIe lanes on the server version are in space holding SoC components on the consumer models.
Nah, it is most likely the same die, AMD don't have the resources to go nuts on custom dies. Also, it is not like ryzen has iGPU or something like that, there isn't really anything to replace for server because ryzen itself is a server design to begin with.
It's definitely all the same die. The article is wrong however, saying ryzen has only 24 pcie lanes. The chip definitely has 32 (if you want, you can actually count them rather easily in the die shot even - bottom left and top right corner, they look exactly the same as they do on the gpu die shots). However it appears some (8) simply aren't connected on the consumer (am4 socket) version (with 16 being used for pcie graphics, 4 for m.2 slot (or sata) and 4 for chipset link).
Ryzen seems to unofficially supports ECC RAM. Although it works, it's not confirmed to be fully functional to my knowledge. But Row Hammer tests show it seems to work. Same was with AM3 chips, I built a few low cost NAS and Servers for customers with small budgets.
Ryzen 8 cores has 20 total PCIE 3.0 lanes. 16 PCIE 3.0 lanes going to GPU, 4 PCIE 3.0 lanes to storage. It also has 4 PCIE 2.0 lanes to chipset. http://media.gamersnexus.net/images/media/2017/CES... The Naples 32 cores has a total of 16*4 = 64 total GPU lanes, which makes sense. I'd guess each 8-core ryzen in the Naples SOC uses the 4 PCIE 3.0 lanes for communication between them.
Each socket supports 128 physical PCIe lanes. So a single-socket system will have 128 PCIe lanes available for the system to use.
In a dual-socket system, 64 physical PCIe lanes are used to connect the two sockets together, running their own transport protocols on top to form the Infinity Fabric. Which leaves 64 PCIe lanes from each socket to the rest of the system, for a grand total of 128 usable PCIe lanes for the system.
Agreed. And I love the fact that AMD can get away doing this with a single "small" die. And hope the communication is fast enough over all these off-die links. Otherwise it's easy to cherry pick some benchmark not needing communication and falling behind everywhere else. Intel doesn't build those monster 500+ mm² dies because they like bad yield...
The same way a 500$ ryzen is as faster than a 1000$ i7.
If AMD offer the same value intel does, why would people chose AMD? They need to massively undercut intel and steal market share, which given the ridiculous xeon prices would be quite easy, while still allowing AMD to sell those chips at healthier margins than they would in desktop.
> why would people chose AMD? because - as mentioned perviously - they have a server SoC with better specs. Besides in the Enterprise server market the software license is many times the cost of the hardware, so customers aren't so worried about hardware costs. AMD will choose a price to optimise their profits
Software license costs is a good point. Worth remembering that a lot of stuff is priced per-core rather than per-socket these days, so Naples probably won't do great on that front (lower IPC and lower clocks than Intel).
@Meteor2: Lower clocks: We don't know; it depends on the power. Based on what we've seen with Ryzen, idle and power under load are in fact marginally lower than Broadwell. It has lower peak clocks than kaby lake (i7700) but in server, that doesn't matter. Most of server is clocked at 2-3GHz depending on the number of cores and TDP, which Zen manages fine.
IPC is a fair point, if the workload is compute-bound. If Oracle is sensitive to the ~10% IPC deficit that Zen has, it might matter. Plenty of workloads run on OSS, though: web servers/app backends being the most common case. The hard problem will be to convince folks to buy... You can't get fired for buying IBM/Intel, right :)
Enterprise as you say is somewhat indifferent to pricing but what they aren't indifferent to is Intel - you would be hard pressed to get large shops to go with AMD. Intel is a known quantity and that is very important in 24/7/365 operations.
@ Icehawk: Yes, but to be fair, this isn't AMD's first rodeo. They fell off the horse and took a while to get back on. It's also not just about CPU pricing but TCO. If you want to put a lot of gpu + nvm drives on a system and need (say) 128 PCIe lanes, you need two racks of Intel 2P Xeons (or 4P xeons, if they support that many. They're even pricier). So now, add in the cost of rack, space, cooling, network switches, power, resultant bottlenecks. My point is that enterprise/cloud is not insensitive to pricing either.
24/7/365: That's IBM, isn't it? The facebooks/googles/amazons won't pre-order Naples on Amazon, rest assured. They'll deploy them on small systems, study it, and scale up slowly. It will be slow and steady for AMD... My guess is server revenue will come around mid 2018.
Because they need their place in the market. It's better to sell 1000 CPUs for 50% of the price than 500 for 100%. More CPUs sold, better reputation, better dependability, more people satisifed = more people will purchase it in future.
I don't think you read between the lines. Naples is 4 ryzen chips on a package. If my guess is correct it will scale better than a dual socket configuration. BUT, this is a big BUT. if each ryzen chip has 2 memory channels then does it mean the other 6 memory channels considered as remote memory?? there is a 40% drop in performance in a dual socket configuration if one socket is accessing the memory of the other. This is with intel having 4 channels (the only reason that should be the case if the memory exceeds the ram in that socket). now we are talking about just 2 channels. So my best guess is it will perform like a champ for multithreaded workload that can fit into the ram in the 2 channels(Like the vms). but would be really bad for those app that need a large amount of ram. hmm..
Based on the scaling numbers reported by AMD, Peter Bright at Arstechnica has concluded the benchmark AMD is showing off is extremely limited by memory bandwidth not general CPU performance.
Yeah, I don't think anyone actually expects this to be twice as fast as Intel. But maybe 40%-50% should be doable, just from the extra cores alone. And likely for a lower-price as well. Either way, Naples will probably be a no-brainer for most companies.
@ DanNeely: Yes, but most of the server space is like that. The CPU is constantly 'waiting' on something: disk, n/w, other I/O, memory, etc. That's pretty much the point of a server: huge data sets, lots of memory, lots of I/O. Re. general CPU perf, Zen is extremely competitive with Intel (you have to recall that the frequency advantage that i7700 has will go away in server. Server clocks at 2-3GHz base), Where it clearly lacks is AVX-256, which is largely an HPC thing. Also, if you're memory bound, AVX-256 (or 512) won't help you anyway. You're limited by bandwidth.
If you talk about HPC, They could relied on Co-processor such as NV or AMD compute card for those application. I mean even Intel relied on their Intel Phi co-processor to build supercomputer
Which reviews? Because I saw a chart (http://wccftech.com/amd-ryzen-7-1800x-8-core-bench... showing that Ryzen's integer performance blows the competition away. I don't know about the floating point performance, but it's probably meh, due to the plan to offload math to the GPU. Also, the crazy number of PCIe lanes means it can link to anything using a non-proprietary interface, PCIe, and maybe even something like NVLINK and a Tesla cluster. I'm no expert. Also, the whole AVX-128 vs AVX-256 thing is kind of a red herring afaik, due to the fact that AVX-256 is very computationally expensive, and there were some thermal issues related to trying to do the whole 256 in one get-go, or something like that.
If Ryzen's Desktop prices is any indication, the era of cheap In-Memory computing is coming. No longer do you have to spend an ARM and Leg to get the CPU AND the Motherboard just because you need 512GB, and up to 2TB Ram, or 4TB Ram in 1U Case.
Of coz that is assuming 128GB Ram will come ( announced in 2015 ).
Nifty stuff. What I'm really interested to see is how this not only scales upwards, but downwards as well. Truthfully, there are some workloads out there which don't require 32 physical cores. I'm thinking 2 core or 4 core (either with SMT) for small scale storage servers. If they can fit 32 physical cores on a single die @ <130w, have a nice dual/quad core for home NAS units with some support for ECC would be terrific. (Yes, I mean similar to FreeNAS w/ ZFS).
Right now the only choice for small NAS builds are Xeons, and while you can get older Xeons used on the secondary market and fit them with ECC, trying to get some of the low power Xeons is difficult because they're stupidly expensive.
Is having a nominally affordable quad core ECC small MOBO server too much to ask? (apparently so if you can only pick Intel).
That being said, I did read that the memory controller on the Ryzen consumer CPU ---IS--- ECC enabled, but it has to be implemented at the motherboard level.
"Right now the only choice for small NAS builds are Xeons"
Nah, those mediocre bricking atoms were created specifically for this purpose. The boards come with scores of SATA connectors, ECC is supported, on die high speed nics.
NAS is NOT server. I doubt zen will feature a native dual core, maybe in time as bad dies pile up they might launch a dual core version based on failed quads with disabled cores.
FYI, it's not a single 32 core die. It's a multi-chip package. From the article "Naples uses four of AMD’s Zeppelin dies (the Ryzen dies) in a single package." I wouldn't hold your breath though for a model with a low core count, because it would likely screw up other parts of the SOC. Cutting out dies would likely mean fewer memory controllers and fewer PCIe lanes, which may even mean a different socket would be needed. I would think you might end up seeing, way down the road, models with as low as 16 cores. But I doubt much lower than that because it would either mean they're having terrible yields and have a lot of junk dies to sell (which does not appear to be the case) or they'd have to disable cores on dies that work fine that they could otherwise sell for more money. Demand would have to incredible high for lower core count to get them to go down that road with this platform.
Also, I'm pretty sure almost all AMD chips for many years have had ECC enabled in their memory controllers and just dependent on the motherboard to support it.
Every AMD CPU from the original AthlonXP/MP has supported ECC RAM. There may have been a few 32-bit Duron/Sempron CPUs that didn't, but the 64-bit ones did. I don't think AMD makes a 64-bit CPU without ECC support.
Not every motherboard supported ECC, sure. But every CPU was capable of supporting it.
Actually, when you get right down to it, every AMD CPU has been virtually identical in the features that were supported (across family/generational lines). The only things you really had to decide on were the number of cores, the frequency, and the TDP. Everything else was the same (NX, SVM, ECC, all the different extentions, etc).
It's one of the nicer things about choosing AMD systems, especially when compared to the hideously huge, complicated matrices needed to find an Intel CPU that supports all the features you think you may need at some point down the line, and cross-referencing that with what your local supplier has access to. We were a heavy user of AMD systems (desktop and server) for many years because of this. We started purchasing Xeon E5 systems last year for our VM hosting servers as the Opteron systems just haven't been keeping up. :(
Will be interesting to see what the system prices are like next year with Naples. Our Xeon days could be just a blip. :)
AMD always gets a serious look from me because they have been very good about including features in every CPU and don't nickel and dime for features. I bought a Core 2 Duo laptop in 2008 that didn't include virtualization instructions. I hate having to look things up in ARK. Next build will be a Ryzen APU to replace my Phenom II 1055T, which was a drop-in replacement for an Athlon X2 7750. That socket compatibility was very nice and saved me a lot of cash.
Blah -- you don't *NEED* ECC for FSS -- everyone preaches it but every single file system on every OS uses free memory for disk caching -- not just ZFS -- and most of them don't have checksum support and stuff -- so if you are going to insist you need ECC for ZFS then you should insist you need ECC for pretty much every OS.FS combo out there EVEN MORE.
Don't hold your breath. Intel won't lower its prices much until it comes up with a more efficient (less wasteful) architecture as well. Maybe 20% at most.
Thank you for writing the plural of "die" as "dies" instead of "dice" :)
I know it must sound a trivial thing, but "dice" just doesn't sound like the correct plural for a processor die, so it's genuinely lovely to see the use of "dies" here.
If you go to your source and look at "die" as a portion of a semiconductor wafer, both "dies" and "dice" are acceptable. For most technical definitions of the word die, like a mold, "dies" is the only correct plural form.
"So while the consumer product line gets columns, the enterprise product line gets profits and high margins. Launching an enterprise product that gains even a few points of market share from the very large blue incumbent can implement billions of dollars to the bottom line, as well as provided some innovation as there are now two big players on the field. One could argue there are three players, if you consider ARM holds a few niche areas, however one of the big barriers to ARM adoption, aside from the lack of a high-performance single-core, is the transition from x86 to ARM instruction sets, requiring a rewrite of code. If AMD can rejoin and a big player in x86 enterprise, it puts a small stop on some of ARMs ambitions and aims to take a big enough chunk into Intel."
Soneone should proof-read that. Otherwise, interesting stuff coming from AMD. The CPU market really needs at least two healthy competitors with competitive high-end products.
It would be interesting to see how it performs on HPC benchmarks...
I'll believe it when I see it.
AMD used to be the value proposition option vs. the Xeons, but nowadays, I'm not so sure.
Intel has been DOMINATING the HPC performance world for a long time now and there is no data to support the hypothesis that that is going to change any time soon.
As DeltaFX said above, most HPC is i/o performance limited -- and Broadwell doesn't have great i/o. AMD's Infinity Fabric might be a bit good, in which case Naples will be too... Like a beefier Xeon Phi.
I bet if they converted some of those PCIe lanes into NvLink, they could challenge Intel on HPC. Even though IBM makes processors with NvLink, AMD would have the advantage of the x86 ISA.
Now Intel's real worry begins...I highly doubt they cared much about the enthusiast market as it's very small to the company's overall revenue... Data center penetration from AMD is where Intel's wallet is going to hurt the most.
"a few points of market share from the very large blue incumbent can implement billions of dollars to the bottom line"
You are overestimating the market. It's maybe 14 billion this year and margins are great but so is retail and Summit Ridge. A few % in server is little and even 20% is a lot less than what CPU desktop can do mid term. Summit Ridge and Pinnacle Ridge can be huge for AMD as there is a lot of demand for more cores.Think how many users just refused to upgrade to another 4 cores over the last few years. Ofc they do need to show some gains in games, improve IPC next year and push clocks higher to get the most out of it.
I was referring to the server CPU market and yeah Intel has over 99% revenue. In units it's 22-23 million per year - units as in CPUs ( sockets) not server(the box) units.
The PC CPU/APU market is 30+ billion but Summit Ridge has really nice ASPs and margins in retail.
"the transition from x86 to ARM instruction sets, requiring a rewrite of code"
That's not really true. Most languages and compilers already fully support ARM. All that is needed is to recompile the code for the target architecture.
The only people who would need to rewrite code are those who have in-lined hand-tuned assembly code. Which isn't the biggest segment of the market.
Recompiling the code for another architecture is not as easy as just recompiling. All those man hours spent fine tuning the code to get around compiler bugs and increase performance have to be spent again doing the same thing for the different architecture.
Problem with recompiling code (e.g. to ARM) for these sorts of specialist software is that you might not be the one with the source code. You might be forking out $10k per license and then the software vendor just gives you a Windows EXE for example. You ask the vendor about ARM and Linux and they say "Yeah that's interesting, we'd like to do that, but we don't have the staff."
And if it's open source, on day 1 you say "Yay! I have the source, I'll just type make", then "hmm what are these weird flags and switches in the makefile?", then "why are there 15 makefiles that call each other and the ARM option isn't written in 3 of them?" When you've sorted that out (on day 20) you realise you now need an ARM build of all 136 libraries the program relies on or links to. Fortunately, it's all open source so you download them all. Hmm. It doesn't link. It appears this software relies on an outdated version of the API for four of these libraries. Now you have to search the repositories and reconstruct the old version of the source for four codes you know nothing about, at a particular point in time. See how this can get time consuming?
@ Twirrim: ARM support isn't the same as ARM support with performance. There are enough ISA differences, such as the memory model (ARMs is weaker) which make it non-trivial to be performant and correct at the same time. These can certainly be solved but first, you need to know that the problem exists and then, spend time and resources to fix it. x86-64 has had over 2 decades of optimization behind it that a simple recompile cannot fix. I've said this before on one AT forum, that if naples is half good, it pushes the ARM server market back by ~5 years. Naples is more than half-good; certainly gives more threads, more I/O and more memory channels than both Qualcomm and Cavium. We know ST and MT perf is good from Ryzen launch. The reason the market wants choice is to keep Intel's prices down. It doesn't need choice in ISA, just choice in vendor.
Commercial/Enterprise servers (rather than HPC supercomputers) make up ~80% of all server sales. And due to Intels huge margins, ~58% of their operating profit.
Naples with its more cores, less power, lower price and SME/SEV is going to provide them with their first real competition in years.
I am a bit woried about the infitiny fabric socket interconnect. It it will have the same bandwidth as PCI-E 3.0, which is cca 1GBps for 1 lane, 64lanes have only 64GBps, which is much slower that the memory bandwith for 1 socket, which is 170GBps. Therefore, since this is a NUMA architecture, memory access from one socnet to other socets RAM will be significantly crippled not counting the intra-processor communication, which make it eve slower. Hope the frequency on the inifinity fabric going over PCI-E lanes will be significantly faster, else non-NUMA aware SW will be slow.
I don't think they said it uses PCIe, just that it multiplexes on the PCIe pins. I doubt they're using PCIe protocol for socket-to-socket interconnect.
I can't find the link right now, but there's a really nice article that covers Infinity Fabric more deeply, and how it's a superset of HypetTransport 3.0. It's scalable into the hundreds of MBps of throughput.
I don't think you read between the lines. Naples is 4 ryzen chips on a package. If my guess is correct it will scale better than a dual socket configuration. BUT, this is a big BUT. if each ryzen chip has 2 memory channels then does it mean the other 6 memory channels considered as remote memory?? there is a 40% drop in performance in a dual socket configuration if one socket is accessing the memory of the other. This is with intel having 4 channels (the only reason that should be the case if the memory exceeds the ram in that socket). now we are talking about just 2 channels. So my best guess is it will perform like a champ for multithreaded workload that can fit into the ram in the 2 channels(Like the vms). but would be really bad for those app that need a large amount of ram. hmm.. This will also mean this will only be targeted to those server farms with huge number VMs. I admit that is the largest market for such chips. And this should also scale well when the ryzen chip added 2 more cores then Naples will have 40 cores. but for big data analytics this will not be the chip to buy as single monolithic chip is still needed to avoid the huge remote memory access cost.
Yeah, I think your right. I think the commercial/enterprise market is exactly where Naples is targeted.
I imagine that for HPC/Big Data they'll do what they've already talked about, ie- HPC APUs with HBC/HBM. Which won't be monolithic, but MCM on an interposer. There were rumors of a second 8 core chip, so I think it's likely (if true) that it's the one for HPC APUs.
I read in another review that AMD calls it 'die NUMA'. It's likely, given that it's an MCM, that the die-to-die channels have much lower latency than going off socket. It's likely that Naples has 3 NUMA levels, on-die, off-die, and off-socket. Without actual benchmarking it's hard to speculate what the perf will be, but it certainly seems like the machine is a 'scale-out' machine, for cloud hosting of different VMs or just different applications. As opposed to a big Oracle database...
I hope that there will be low-end Naples CPUs. I'm holding out for a 1P (non-SMP), 16-core, 64 PCI-e lanes Naples CPU. And hopefully low-priced workstation motherboards without chipset.
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lilmoe - Tuesday, March 7, 2017 - link
Given the MT showings of Ryzen, and the relatively lower price, this should wipe the floor with Intel in the server segment in density, performance AND efficiency. I really hope this takes off for AMD. This market is in dire need of solid competition.WinterCharm - Tuesday, March 7, 2017 - link
I agree. What a time to be alive... CPU's are getting exciting again!ddriver - Tuesday, March 7, 2017 - link
128 pcie lanes, that sounds like my kind of toy. Meanwhile, top end xeons come with only 32.128 lanes also means that at least by design ryzen outta have 32 rather than the announced 24 lanes. 8 lanes either disabled or reserved for system use?
They say in dual socket each chip loses half the pcie lanes, but I assume just because they need the pins for infinity fabric, rather than actually using pcie for socket to socket transfers, the pcie protocol isn't optimal for that task even if bandiwdth is plenty, those pins can be better utilized in multi socket systems.
Ryzen might suffer a bit in single threaded performance, but that is only because the architecture is optimized from the ground up for HPC and server in mind. It will make a great server chip, which is a smart move by AMD, seeing the kind of margins that market has compared to desktop. Ryzen is already great for content creation workstations, the only minor complaint being the pcie lane count, and the lack of ecc memory support, and Naples solves those two.
I assume pricing will be very nice too, because that's what they did in desktop, and in servers it will be even easier to massively undercut intel, because their server chips are even-more-ridiculously-overpriced. And amd needs to steal server market badly, so it can sell as many of those cores at much higher prices than they would in desktop.
A xeon E7-8890 v4 costs the whooping 7400$. A top end Naples will easily wipe the floor with it, and seeing how it is merely 4 500$ Ryzen dies slapped together, I would not be surprised to see that chip retailing at around 3000$.
ERJ - Tuesday, March 7, 2017 - link
E7-8890 is a 4 socket chip. A more fair comparison would be E5-2699 which is a dual processor chip (22-Core). Those go for around $3500 retail.ERJ - Tuesday, March 7, 2017 - link
Strike that...an 8 socket chip.ddriver - Tuesday, March 7, 2017 - link
The 4S version ain't much cheaper thou - 7000$. There is really no 2S direct equivalent, but if there was, I doubt it would be less than 6k$.ZeDestructor - Tuesday, March 7, 2017 - link
Actually, if you design your own cache-coherent QPI "switches" (like SGI), you can go much, much higher, into the thousands...DanNeely - Tuesday, March 7, 2017 - link
"128 lanes also means that at least by design ryzen outta have 32 rather than the announced 24 lanes. 8 lanes either disabled or reserved for system use?"This doesn't necessarily follow, while similar overall tinkering around the edges on common blocks is common. It's possible the extra PCIe lanes on the server version are in space holding SoC components on the consumer models.
ddriver - Tuesday, March 7, 2017 - link
Nah, it is most likely the same die, AMD don't have the resources to go nuts on custom dies. Also, it is not like ryzen has iGPU or something like that, there isn't really anything to replace for server because ryzen itself is a server design to begin with.extide - Wednesday, March 8, 2017 - link
They already said its the same die, Zepplinmczak - Tuesday, March 7, 2017 - link
It's definitely all the same die.The article is wrong however, saying ryzen has only 24 pcie lanes. The chip definitely has 32 (if you want, you can actually count them rather easily in the die shot even - bottom left and top right corner, they look exactly the same as they do on the gpu die shots). However it appears some (8) simply aren't connected on the consumer (am4 socket) version (with 16 being used for pcie graphics, 4 for m.2 slot (or sata) and 4 for chipset link).
drajitshnew - Wednesday, March 8, 2017 - link
That's a shame.one of the major areas where ryzen falls short of BroadwellE is PCIE lanesextide - Wednesday, March 8, 2017 - link
If thats true then my theory of them using those lanes for inter-die comms on each cpu is even betterNeatOman - Tuesday, March 7, 2017 - link
Ryzen seems to unofficially supports ECC RAM. Although it works, it's not confirmed to be fully functional to my knowledge. But Row Hammer tests show it seems to work. Same was with AM3 chips, I built a few low cost NAS and Servers for customers with small budgets.Itselectric - Tuesday, March 7, 2017 - link
Are there any credible sources indicating ECC memory support, even if unofficial? If so, I'd be very interested.KompuKare - Tuesday, March 7, 2017 - link
Yes, it was officially confirmed in the Ryzen AMA on Reddithttps://www.reddit.com/r/Amd/comments/5x4hxu/we_ar...
rom0n - Tuesday, March 7, 2017 - link
Ryzen 8 cores has 20 total PCIE 3.0 lanes. 16 PCIE 3.0 lanes going to GPU, 4 PCIE 3.0 lanes to storage. It also has 4 PCIE 2.0 lanes to chipset. http://media.gamersnexus.net/images/media/2017/CES...The Naples 32 cores has a total of 16*4 = 64 total GPU lanes, which makes sense.
I'd guess each 8-core ryzen in the Naples SOC uses the 4 PCIE 3.0 lanes for communication between them.
PixyMisa - Tuesday, March 7, 2017 - link
It's PCIe 3.0 to the chipset, PCIe 2.0 from the chipset.phoenix_rizzen - Tuesday, March 7, 2017 - link
It's right there in the article.Each socket supports 128 physical PCIe lanes. So a single-socket system will have 128 PCIe lanes available for the system to use.
In a dual-socket system, 64 physical PCIe lanes are used to connect the two sockets together, running their own transport protocols on top to form the Infinity Fabric. Which leaves 64 PCIe lanes from each socket to the rest of the system, for a grand total of 128 usable PCIe lanes for the system.
niva - Wednesday, March 8, 2017 - link
If your interpretation is correct, that's just nuts.extide - Wednesday, March 8, 2017 - link
It is, its right in the article, and frankly 128 lanes is enough, especially considering that dual socket Xeon "only" gets you 80 lanes.extide - Wednesday, March 8, 2017 - link
I am guessing they are using the "extra" 8 lanes (16 from 24) for communication between the 4 dies on the packageddriver - Friday, March 10, 2017 - link
So the modules in the 4 module MCM don't communicate internally? Where do the extra lanes come from?Lolimaster - Thursday, March 9, 2017 - link
It doesn't suffer in single thread, it had broadwell-skylake IPC, in applications it performs as it should.Games are currently messed up by win10, which win7 fixes for the most part.
nathanddrews - Tuesday, March 7, 2017 - link
Definitely a big step up for the server segment. This is what Ryzen was made for.MrSpadge - Tuesday, March 7, 2017 - link
Agreed. And I love the fact that AMD can get away doing this with a single "small" die. And hope the communication is fast enough over all these off-die links. Otherwise it's easy to cherry pick some benchmark not needing communication and falling behind everywhere else. Intel doesn't build those monster 500+ mm² dies because they like bad yield...lefty2 - Tuesday, March 7, 2017 - link
How do you know the price is lower? For looking at specs it should be faster than the Xeon, so if that's true they should sell if for a higher priceddriver - Tuesday, March 7, 2017 - link
The same way a 500$ ryzen is as faster than a 1000$ i7.If AMD offer the same value intel does, why would people chose AMD? They need to massively undercut intel and steal market share, which given the ridiculous xeon prices would be quite easy, while still allowing AMD to sell those chips at healthier margins than they would in desktop.
lefty2 - Tuesday, March 7, 2017 - link
> why would people chose AMD?because - as mentioned perviously - they have a server SoC with better specs.
Besides in the Enterprise server market the software license is many times the cost of the hardware, so customers aren't so worried about hardware costs.
AMD will choose a price to optimise their profits
Meteor2 - Tuesday, March 7, 2017 - link
Software license costs is a good point. Worth remembering that a lot of stuff is priced per-core rather than per-socket these days, so Naples probably won't do great on that front (lower IPC and lower clocks than Intel).deltaFx2 - Tuesday, March 7, 2017 - link
@Meteor2: Lower clocks: We don't know; it depends on the power. Based on what we've seen with Ryzen, idle and power under load are in fact marginally lower than Broadwell. It has lower peak clocks than kaby lake (i7700) but in server, that doesn't matter. Most of server is clocked at 2-3GHz depending on the number of cores and TDP, which Zen manages fine.IPC is a fair point, if the workload is compute-bound. If Oracle is sensitive to the ~10% IPC deficit that Zen has, it might matter. Plenty of workloads run on OSS, though: web servers/app backends being the most common case. The hard problem will be to convince folks to buy... You can't get fired for buying IBM/Intel, right :)
Icehawk - Tuesday, March 7, 2017 - link
Enterprise as you say is somewhat indifferent to pricing but what they aren't indifferent to is Intel - you would be hard pressed to get large shops to go with AMD. Intel is a known quantity and that is very important in 24/7/365 operations.deltaFx2 - Wednesday, March 8, 2017 - link
@ Icehawk: Yes, but to be fair, this isn't AMD's first rodeo. They fell off the horse and took a while to get back on. It's also not just about CPU pricing but TCO. If you want to put a lot of gpu + nvm drives on a system and need (say) 128 PCIe lanes, you need two racks of Intel 2P Xeons (or 4P xeons, if they support that many. They're even pricier). So now, add in the cost of rack, space, cooling, network switches, power, resultant bottlenecks. My point is that enterprise/cloud is not insensitive to pricing either.24/7/365: That's IBM, isn't it? The facebooks/googles/amazons won't pre-order Naples on Amazon, rest assured. They'll deploy them on small systems, study it, and scale up slowly. It will be slow and steady for AMD... My guess is server revenue will come around mid 2018.
drajitshnew - Wednesday, March 8, 2017 - link
Cast your memory back to the original opteron and p4. AMD had the lead every which way, but most data centers still preferred intel.lilmoe - Tuesday, March 7, 2017 - link
That, and higher yields for four separate smaller dies in a single package.Nem35 - Thursday, March 9, 2017 - link
Because they need their place in the market. It's better to sell 1000 CPUs for 50% of the price than 500 for 100%.More CPUs sold, better reputation, better dependability, more people satisifed = more people will purchase it in future.
QwertyTech - Tuesday, March 7, 2017 - link
Price has not been announced yet. They could undercut Intel, but the truth is we simply don't know yet the pricing.sharath.naik - Wednesday, March 8, 2017 - link
I don't think you read between the lines. Naples is 4 ryzen chips on a package. If my guess is correct it will scale better than a dual socket configuration. BUT, this is a big BUT. if each ryzen chip has 2 memory channels then does it mean the other 6 memory channels considered as remote memory?? there is a 40% drop in performance in a dual socket configuration if one socket is accessing the memory of the other. This is with intel having 4 channels (the only reason that should be the case if the memory exceeds the ram in that socket). now we are talking about just 2 channels. So my best guess is it will perform like a champ for multithreaded workload that can fit into the ram in the 2 channels(Like the vms). but would be really bad for those app that need a large amount of ram. hmm..DanNeely - Tuesday, March 7, 2017 - link
Based on the scaling numbers reported by AMD, Peter Bright at Arstechnica has concluded the benchmark AMD is showing off is extremely limited by memory bandwidth not general CPU performance.https://arstechnica.com/information-technology/201...
Krysto - Tuesday, March 7, 2017 - link
Yeah, I don't think anyone actually expects this to be twice as fast as Intel. But maybe 40%-50% should be doable, just from the extra cores alone. And likely for a lower-price as well. Either way, Naples will probably be a no-brainer for most companies.deltaFx2 - Tuesday, March 7, 2017 - link
@ DanNeely: Yes, but most of the server space is like that. The CPU is constantly 'waiting' on something: disk, n/w, other I/O, memory, etc. That's pretty much the point of a server: huge data sets, lots of memory, lots of I/O. Re. general CPU perf, Zen is extremely competitive with Intel (you have to recall that the frequency advantage that i7700 has will go away in server. Server clocks at 2-3GHz base), Where it clearly lacks is AVX-256, which is largely an HPC thing. Also, if you're memory bound, AVX-256 (or 512) won't help you anyway. You're limited by bandwidth.shing3232 - Tuesday, March 7, 2017 - link
If you talk about HPC, They could relied on Co-processor such as NV or AMD compute card for those application. I mean even Intel relied on their Intel Phi co-processor to build supercomputerlefty2 - Tuesday, March 7, 2017 - link
Also, I noticed from the reviews that Ryzen integer performance seems a bit weakEasyListening - Wednesday, March 15, 2017 - link
Which reviews? Because I saw a chart (http://wccftech.com/amd-ryzen-7-1800x-8-core-bench... showing that Ryzen's integer performance blows the competition away. I don't know about the floating point performance, but it's probably meh, due to the plan to offload math to the GPU. Also, the crazy number of PCIe lanes means it can link to anything using a non-proprietary interface, PCIe, and maybe even something like NVLINK and a Tesla cluster. I'm no expert. Also, the whole AVX-128 vs AVX-256 thing is kind of a red herring afaik, due to the fact that AVX-256 is very computationally expensive, and there were some thermal issues related to trying to do the whole 256 in one get-go, or something like that.iwod - Tuesday, March 7, 2017 - link
If Ryzen's Desktop prices is any indication, the era of cheap In-Memory computing is coming. No longer do you have to spend an ARM and Leg to get the CPU AND the Motherboard just because you need 512GB, and up to 2TB Ram, or 4TB Ram in 1U Case.Of coz that is assuming 128GB Ram will come ( announced in 2015 ).
bill.rookard - Tuesday, March 7, 2017 - link
Nifty stuff. What I'm really interested to see is how this not only scales upwards, but downwards as well. Truthfully, there are some workloads out there which don't require 32 physical cores. I'm thinking 2 core or 4 core (either with SMT) for small scale storage servers. If they can fit 32 physical cores on a single die @ <130w, have a nice dual/quad core for home NAS units with some support for ECC would be terrific. (Yes, I mean similar to FreeNAS w/ ZFS).Right now the only choice for small NAS builds are Xeons, and while you can get older Xeons used on the secondary market and fit them with ECC, trying to get some of the low power Xeons is difficult because they're stupidly expensive.
Is having a nominally affordable quad core ECC small MOBO server too much to ask? (apparently so if you can only pick Intel).
That being said, I did read that the memory controller on the Ryzen consumer CPU ---IS--- ECC enabled, but it has to be implemented at the motherboard level.
ddriver - Tuesday, March 7, 2017 - link
"Right now the only choice for small NAS builds are Xeons"Nah, those mediocre bricking atoms were created specifically for this purpose. The boards come with scores of SATA connectors, ECC is supported, on die high speed nics.
NAS is NOT server. I doubt zen will feature a native dual core, maybe in time as bad dies pile up they might launch a dual core version based on failed quads with disabled cores.
rustyshackelford - Tuesday, March 7, 2017 - link
Ryzen supports ECC.cygnus1 - Tuesday, March 7, 2017 - link
FYI, it's not a single 32 core die. It's a multi-chip package. From the article "Naples uses four of AMD’s Zeppelin dies (the Ryzen dies) in a single package." I wouldn't hold your breath though for a model with a low core count, because it would likely screw up other parts of the SOC. Cutting out dies would likely mean fewer memory controllers and fewer PCIe lanes, which may even mean a different socket would be needed. I would think you might end up seeing, way down the road, models with as low as 16 cores. But I doubt much lower than that because it would either mean they're having terrible yields and have a lot of junk dies to sell (which does not appear to be the case) or they'd have to disable cores on dies that work fine that they could otherwise sell for more money. Demand would have to incredible high for lower core count to get them to go down that road with this platform.Also, I'm pretty sure almost all AMD chips for many years have had ECC enabled in their memory controllers and just dependent on the motherboard to support it.
phoenix_rizzen - Tuesday, March 7, 2017 - link
Every AMD CPU from the original AthlonXP/MP has supported ECC RAM. There may have been a few 32-bit Duron/Sempron CPUs that didn't, but the 64-bit ones did. I don't think AMD makes a 64-bit CPU without ECC support.Not every motherboard supported ECC, sure. But every CPU was capable of supporting it.
Actually, when you get right down to it, every AMD CPU has been virtually identical in the features that were supported (across family/generational lines). The only things you really had to decide on were the number of cores, the frequency, and the TDP. Everything else was the same (NX, SVM, ECC, all the different extentions, etc).
It's one of the nicer things about choosing AMD systems, especially when compared to the hideously huge, complicated matrices needed to find an Intel CPU that supports all the features you think you may need at some point down the line, and cross-referencing that with what your local supplier has access to. We were a heavy user of AMD systems (desktop and server) for many years because of this. We started purchasing Xeon E5 systems last year for our VM hosting servers as the Opteron systems just haven't been keeping up. :(
Will be interesting to see what the system prices are like next year with Naples. Our Xeon days could be just a blip. :)
drgoodie - Tuesday, March 7, 2017 - link
AMD always gets a serious look from me because they have been very good about including features in every CPU and don't nickel and dime for features. I bought a Core 2 Duo laptop in 2008 that didn't include virtualization instructions. I hate having to look things up in ARK. Next build will be a Ryzen APU to replace my Phenom II 1055T, which was a drop-in replacement for an Athlon X2 7750. That socket compatibility was very nice and saved me a lot of cash.QwertyTech - Tuesday, March 7, 2017 - link
Less than 130W for 32 cores sounds crazy. Is that even possible or is it just your "dream machine"?extide - Wednesday, March 8, 2017 - link
Yeah they have to run 72 bits of data lines instead of 64, at the very leastextide - Friday, March 10, 2017 - link
Blah -- you don't *NEED* ECC for FSS -- everyone preaches it but every single file system on every OS uses free memory for disk caching -- not just ZFS -- and most of them don't have checksum support and stuff -- so if you are going to insist you need ECC for ZFS then you should insist you need ECC for pretty much every OS.FS combo out there EVEN MORE.Gothmoth - Tuesday, March 7, 2017 - link
i only care about intel dropping the price on the 8 core models.... if AMD can achieve that... kudos!QwertyTech - Tuesday, March 7, 2017 - link
What do you mean? You want AMD to release competitive products or do you just buy only Intel regardless of what AMD can offer?Tabalan - Tuesday, March 7, 2017 - link
Well, I guess it's like this:"You want AMD to release competitive products to buy Intel regardless of what AMD can offer?"
Krysto - Tuesday, March 7, 2017 - link
Don't hold your breath. Intel won't lower its prices much until it comes up with a more efficient (less wasteful) architecture as well. Maybe 20% at most.Valantar - Tuesday, March 7, 2017 - link
64 cores/128 threads and 128 lanes of PCIe 3.0? Cue a new Linus Tech Tips X gamers, one CPU video.rustyshackelford - Tuesday, March 7, 2017 - link
And the thumbnail to that video would be 32 retards blowing each other each with joystick up their ass.lord_anselhelm - Tuesday, March 7, 2017 - link
Thank you for writing the plural of "die" as "dies" instead of "dice" :)I know it must sound a trivial thing, but "dice" just doesn't sound like the correct plural for a processor die, so it's genuinely lovely to see the use of "dies" here.
QwertyTech - Tuesday, March 7, 2017 - link
http://www.quickanddirtytips.com/education/grammar...“die”-is-“dice”-not-“douse”According to this link - "dice" seems in fact to be the grammatically correct term.
It doesn't "feel right" to you maybe, nor to me, but thanking them for being wrong sounds weird to me.
QwertyTech - Tuesday, March 7, 2017 - link
Link has an issue:http://www.quickanddirtytips.com/education/grammar...“die”-is-“dice”-not-“douse”
QwertyTech - Tuesday, March 7, 2017 - link
Different link :https://en.m.wiktionary.org/wiki/dice
cmikeh2 - Tuesday, March 7, 2017 - link
If you go to your source and look at "die" as a portion of a semiconductor wafer, both "dies" and "dice" are acceptable. For most technical definitions of the word die, like a mold, "dies" is the only correct plural form.Kepe - Tuesday, March 7, 2017 - link
"So while the consumer product line gets columns, the enterprise product line gets profits and high margins. Launching an enterprise product that gains even a few points of market share from the very large blue incumbent can implement billions of dollars to the bottom line, as well as provided some innovation as there are now two big players on the field. One could argue there are three players, if you consider ARM holds a few niche areas, however one of the big barriers to ARM adoption, aside from the lack of a high-performance single-core, is the transition from x86 to ARM instruction sets, requiring a rewrite of code. If AMD can rejoin and a big player in x86 enterprise, it puts a small stop on some of ARMs ambitions and aims to take a big enough chunk into Intel."Soneone should proof-read that. Otherwise, interesting stuff coming from AMD. The CPU market really needs at least two healthy competitors with competitive high-end products.
Xajel - Tuesday, March 7, 2017 - link
I'm more interested in workstation grade Opteron, 16C/32T QC DDR4 with 130~180 TDP and high clock speedalpha754293 - Tuesday, March 7, 2017 - link
It would be interesting to see how it performs on HPC benchmarks...I'll believe it when I see it.
AMD used to be the value proposition option vs. the Xeons, but nowadays, I'm not so sure.
Intel has been DOMINATING the HPC performance world for a long time now and there is no data to support the hypothesis that that is going to change any time soon.
Meteor2 - Tuesday, March 7, 2017 - link
As DeltaFX said above, most HPC is i/o performance limited -- and Broadwell doesn't have great i/o. AMD's Infinity Fabric might be a bit good, in which case Naples will be too... Like a beefier Xeon Phi.Ktracho - Tuesday, March 7, 2017 - link
I bet if they converted some of those PCIe lanes into NvLink, they could challenge Intel on HPC. Even though IBM makes processors with NvLink, AMD would have the advantage of the x86 ISA.ACE76 - Tuesday, March 7, 2017 - link
Now Intel's real worry begins...I highly doubt they cared much about the enthusiast market as it's very small to the company's overall revenue... Data center penetration from AMD is where Intel's wallet is going to hurt the most.jjj - Tuesday, March 7, 2017 - link
"a few points of market share from the very large blue incumbent can implement billions of dollars to the bottom line"You are overestimating the market. It's maybe 14 billion this year and margins are great but so is retail and Summit Ridge.
A few % in server is little and even 20% is a lot less than what CPU desktop can do mid term. Summit Ridge and Pinnacle Ridge can be huge for AMD as there is a lot of demand for more cores.Think how many users just refused to upgrade to another 4 cores over the last few years.
Ofc they do need to show some gains in games, improve IPC next year and push clocks higher to get the most out of it.
PixyMisa - Tuesday, March 7, 2017 - link
The server market is around $14 billion per quarter.Or were you referring to Intel's revenue on Xeons? That probably is around $14 billion per year.
jjj - Tuesday, March 7, 2017 - link
I was referring to the server CPU market and yeah Intel has over 99% revenue.In units it's 22-23 million per year - units as in CPUs ( sockets) not server(the box) units.
The PC CPU/APU market is 30+ billion but Summit Ridge has really nice ASPs and margins in retail.
Twirrim - Tuesday, March 7, 2017 - link
"the transition from x86 to ARM instruction sets, requiring a rewrite of code"That's not really true. Most languages and compilers already fully support ARM. All that is needed is to recompile the code for the target architecture.
The only people who would need to rewrite code are those who have in-lined hand-tuned assembly code. Which isn't the biggest segment of the market.
fackamato - Tuesday, March 7, 2017 - link
Recompiling the code for another architecture is not as easy as just recompiling. All those man hours spent fine tuning the code to get around compiler bugs and increase performance have to be spent again doing the same thing for the different architecture.stephenbrooks - Tuesday, March 7, 2017 - link
Problem with recompiling code (e.g. to ARM) for these sorts of specialist software is that you might not be the one with the source code. You might be forking out $10k per license and then the software vendor just gives you a Windows EXE for example. You ask the vendor about ARM and Linux and they say "Yeah that's interesting, we'd like to do that, but we don't have the staff."stephenbrooks - Tuesday, March 7, 2017 - link
And if it's open source, on day 1 you say "Yay! I have the source, I'll just type make", then "hmm what are these weird flags and switches in the makefile?", then "why are there 15 makefiles that call each other and the ARM option isn't written in 3 of them?"When you've sorted that out (on day 20) you realise you now need an ARM build of all 136 libraries the program relies on or links to. Fortunately, it's all open source so you download them all. Hmm. It doesn't link. It appears this software relies on an outdated version of the API for four of these libraries. Now you have to search the repositories and reconstruct the old version of the source for four codes you know nothing about, at a particular point in time. See how this can get time consuming?
deltaFx2 - Thursday, March 9, 2017 - link
@ Twirrim: ARM support isn't the same as ARM support with performance. There are enough ISA differences, such as the memory model (ARMs is weaker) which make it non-trivial to be performant and correct at the same time. These can certainly be solved but first, you need to know that the problem exists and then, spend time and resources to fix it. x86-64 has had over 2 decades of optimization behind it that a simple recompile cannot fix. I've said this before on one AT forum, that if naples is half good, it pushes the ARM server market back by ~5 years. Naples is more than half-good; certainly gives more threads, more I/O and more memory channels than both Qualcomm and Cavium. We know ST and MT perf is good from Ryzen launch. The reason the market wants choice is to keep Intel's prices down. It doesn't need choice in ISA, just choice in vendor.jihe - Tuesday, March 7, 2017 - link
Based on Ryzen performance these will be very very good. Hats off to AMD.Haawser - Wednesday, March 8, 2017 - link
Commercial/Enterprise servers (rather than HPC supercomputers) make up ~80% of all server sales. And due to Intels huge margins, ~58% of their operating profit.Naples with its more cores, less power, lower price and SME/SEV is going to provide them with their first real competition in years.
Walkeer - Wednesday, March 8, 2017 - link
I am a bit woried about the infitiny fabric socket interconnect. It it will have the same bandwidth as PCI-E 3.0, which is cca 1GBps for 1 lane, 64lanes have only 64GBps, which is much slower that the memory bandwith for 1 socket, which is 170GBps. Therefore, since this is a NUMA architecture, memory access from one socnet to other socets RAM will be significantly crippled not counting the intra-processor communication, which make it eve slower. Hope the frequency on the inifinity fabric going over PCI-E lanes will be significantly faster, else non-NUMA aware SW will be slow.deltaFx2 - Thursday, March 9, 2017 - link
I don't think they said it uses PCIe, just that it multiplexes on the PCIe pins. I doubt they're using PCIe protocol for socket-to-socket interconnect.phoenix_rizzen - Sunday, March 12, 2017 - link
I can't find the link right now, but there's a really nice article that covers Infinity Fabric more deeply, and how it's a superset of HypetTransport 3.0. It's scalable into the hundreds of MBps of throughput.For now, here's the Wikipedia link:
https://en.m.wikipedia.org/wiki/HyperTransport#Inf...
phoenix_rizzen - Sunday, March 12, 2017 - link
Ah, here it is:http://wccftech.com/amds-infinity-fabric-detailed/
zodiacsoulmate - Wednesday, March 8, 2017 - link
im looking at my next desktop computer processorsharath.naik - Wednesday, March 8, 2017 - link
I don't think you read between the lines. Naples is 4 ryzen chips on a package. If my guess is correct it will scale better than a dual socket configuration. BUT, this is a big BUT. if each ryzen chip has 2 memory channels then does it mean the other 6 memory channels considered as remote memory?? there is a 40% drop in performance in a dual socket configuration if one socket is accessing the memory of the other. This is with intel having 4 channels (the only reason that should be the case if the memory exceeds the ram in that socket). now we are talking about just 2 channels. So my best guess is it will perform like a champ for multithreaded workload that can fit into the ram in the 2 channels(Like the vms). but would be really bad for those app that need a large amount of ram. hmm.. This will also mean this will only be targeted to those server farms with huge number VMs. I admit that is the largest market for such chips. And this should also scale well when the ryzen chip added 2 more cores then Naples will have 40 cores. but for big data analytics this will not be the chip to buy as single monolithic chip is still needed to avoid the huge remote memory access cost.Haawser - Wednesday, March 8, 2017 - link
Yeah, I think your right. I think the commercial/enterprise market is exactly where Naples is targeted.I imagine that for HPC/Big Data they'll do what they've already talked about, ie- HPC APUs with HBC/HBM. Which won't be monolithic, but MCM on an interposer. There were rumors of a second 8 core chip, so I think it's likely (if true) that it's the one for HPC APUs.
It's going to be interesting. No doubt.
deltaFx2 - Thursday, March 9, 2017 - link
I read in another review that AMD calls it 'die NUMA'. It's likely, given that it's an MCM, that the die-to-die channels have much lower latency than going off socket. It's likely that Naples has 3 NUMA levels, on-die, off-die, and off-socket. Without actual benchmarking it's hard to speculate what the perf will be, but it certainly seems like the machine is a 'scale-out' machine, for cloud hosting of different VMs or just different applications. As opposed to a big Oracle database...0ldman79 - Monday, March 13, 2017 - link
I totally read his name as "Forrest Nimrod" the first time...IntoGraphics - Wednesday, March 15, 2017 - link
I hope that there will be low-end Naples CPUs.I'm holding out for a 1P (non-SMP), 16-core, 64 PCI-e lanes Naples CPU. And hopefully low-priced workstation motherboards without chipset.