Update: Intel has sent over a statement clarifying that Lakefield will begin showing up in retail devices in 2020. And in particular that we should expect to see Lakefield devices as part of the Holiday 2020 device refreshes. Intel has stated that the comments made at the event were not specifically talking about a 'Lakefield Refresh' product, but a line of 'refresh products' based on Lakefield, and that we misheard the engineer's comments. It should be noted however that we have parity from other press in the room of our interpretation of the comments made.

At the IEEE International Electron Devices Meeting (IEDM) 2019, Intel had two package integration presentations, one on its Omni-Directional Interconnect and one on its 3D stacking Foveros technology. In the first talk, one of Intel’s engineers presenting at the conference said a rather curious thing that hasn’t been previously disclosed.

One of the highlights of 2019 as a whole has been Intel’s disclosures about its new 3D stacking, or ‘Foveros’, technology. The idea here is that using multiple silicon dies stacked on top of each other, you can decrease the overall die size of a chip but also increase the bandwidth if one of the silicon dies is dedicated to cache or memory. In the case of Intel’s first Foveros chip, Lakefield, we have one IO die and one compute die on different process nodes stacked together with additional PoP memory on top of the stacked design. Lakefield has been announced for two products so far, the Samsung Galaxy Book S and the Microsoft Surface Neo, both of which are scheduled to come to market in mid-2020.

Intel’s second announced Foveros chip is its new X^e-HPC architecture based graphics card design for high performance computing. Given the code name ‘Ponte Vecchio’, the new GPU is slated for a late 2021 launch and will use Foveros technology to help build out compute performance across 8 compute dies per slide, and Ponte Vecchio will have two slices per GPU. This GPU is being built primarily for the exascale-class Aurora supercomputer, which is set to be installed in the Argonne National Laboratories in 2021.

So what was the off-hand comment made at IEDM this year? On stage, an Intel Principle Engineer stated that by Holiday 2020, we should expect to see Lakefield Refresh based devices in the market. The engineer did state that first generation of Lakefield was already shipping, and that we should expect to see the next refresh of hardware/devices in finished consumer products by the end of 2020.

Intel is betting on its new Foveros technology, as with its EMIB interconnects, as a corner stone of certain areas of its product portfolio as we roll into the new decade. It will be interesting to see if the cost can be amortized into more price-sensitive areas. During the same IEDM presentation, the same principle engineer also mentioned that the Foveros stacking technology can also lend itself to adding on a modem into that stack – given that Intel recently announced a partnership with Mediatek to provide 5G connectivity for its products, one can make the assumption that at some point we’ll see a Foveros product with a modem too.

Hopefully Intel will disclose more in the early part of 2020.

Related Reading

• CES 2019 Quick Bytes: Intel’s 10nm Hybrid x86 Foveros Chip is Called Lakefield
• Intel's Interconnected Future: Combining Chiplets, EMIB, and Foveros
• Hot Chips 31 Live Blogs: Intel Lakefield and Foveros
• Intel’s Xe for HPC: Ponte Vecchio with Chiplets, EMIB, and Foveros on 7nm, Coming 2021
• Intel's new Atom Microarchitecture: The Tremont Core in Lakefield
• Samsung Develops Intel Lakefield-Based Galaxy Book S: Always-Connected x86 PC
• MediaTek Announces Dimensity 1000 SoC: Back To The High-End With 5G
• Intel and MediaTek Announce Partnership To Bring 5G Modems to PCs