Original Link: https://www.anandtech.com/show/14183/intel-to-align-3rd-generation-optane-dcpmm-with-ddr5
Intel To Align 3rd Generation Optane DCPMM with DDR5: R&D in New Mexico
by Ian Cutress on April 10, 2019 1:00 PM EST- Posted in
- Memory
- Intel
- Optane
- Cascade Lake
- Optane DIMMs
- Optane DCPMM
- DDR4-T
At Intel’s Data-Centric Innovation Day, Intel clarified with us where it sits in relation to its Optane DC Persistent Memory Strategy.
While Intel made official launches for its new Cascade Lake Xeon Scalable platform with Optane DC Persistent Memory, we had a few meetings later that day to discuss the trending topics of the morning. One of those meetings was with Alper Ilkbahar, VP & GM of Intel’s Data Center Memory and Storage, who clarified parts of Intel’s roadmap on Optane DCPMM. With the technology being one of the key product differentiators on Intel’s side, it was key important to understand what the situation was with the technology.
As we previously reported, Intel and Micron are going their separate ways with regards to the 3D XPoint technology endeavor. Borne out of the IMFT joint venture between the two companies, the technology has been manufactured at the IMFT plant in Lehi, Utah, with each side getting half of the product off of the manufacturing line. In early 2018, the two companies decided to end their NAND partnership, with each company doing their own R&D into the third generation technologies. On the back of that, Micron had the rights to buy its stake in the JV, which includes the fab making the memory, and Micron announced at the end of 2018 its intension to exercise that right, which should have been completed on January 1st, 2019. As part of that deal, Intel hands over complete control of the fab to Micron, but still has access to its manufacturing facilities for another twelve months. After that, either Intel has to create a supply agreement with the fab, or manufacture its own.
In our discussions with Intel, the company confirmed that it would be equipping one of its facilities in New Mexico to enable research and development of its third generation Optane memory. The timescale of this was not discussed, nor was the intended manufacturing location. Intel clarified that it would only state that R&D was in New Mexico - if manufacturing were to happen there, the only fab Intel operates there is Fab 11X in Rio Rancho. That fab was planned to be upgraded to enable additional 14nm capacity as well as help bring up 10nm during 2020/2021, and Intel would not clarify if manufacturing would happen there - just R&D.
Also discussed was the form that Optane will take. Intel discussed that it was committed for Optane in a memory module form factor, and that it will be compatible with DDR5. That wasn’t to rule out third generation Optane for DDR4, but that third generation Optane will be the first to be pin-compatible with DDR5. Ultimately, the controller on the DIMM has to support the standard, rather than the memory, but Intel specified that this will be the inflection point.
If one were to extrapolate, and pair new Optane generations with Intel’s enterprise CPU roadmap, this might equate to 10nm Ice Lake having second generation Optane, given as it is DDR4, and a newer generation (perhaps Sapphire Rapids?) supporting both third generation Optane and DDR5. However these are conscious extrapolations into unknown areas of Intel’s roadmap, and should be taken as educated guesses. It all depends on how fast Intel decides to spin up its fab in New Mexico for Optane, and future generations of Optane.
We also encouraged Intel to talk about how newer generations of Optane will grow. One of the key factors in the first generation Optane is that at high performance, the memory modules hit a limit with regards the DIMM specification, with each DIMM rated to 18W. In order to improve capacity or performance, Intel is going to have to make great strides with efficiency, or build an enhanced connector for the technology. Given that Intel is committed to DDR5 for third generation Optane, the latter is unlikely to happen. The easiest way to improve power efficiency would be to support Optane on a smaller process node, but also other areas in memory and power management will be important as well. Intel clarified that they aim to improve future generation Optane on as many fronts as possible.
When asked, Intel also postulated the idea of perhaps providing off-roadmap versions of Optane in the future. While currently it is not in the plans, depending on the customer, Intel may look into special versions of Optane for a big client, for either performance or capacity.
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