I love these little systems, but it's getting a bit crowded here...
I'm still tied to Enterprise Linux 8 for RHV/oVirt, which might never properly support the mix of E/P cores and I haven't gotten around testing it with an Alder Lake notebook I recently bought. I would hope that with numactl some degree of manual control would be possible, if only to disable the E-cores and have the systems behave like better Tiger Lakes (or the reverse for better Jasper Lakes).
Lack of a 2nd Thunderbolt port is a bit disappointing, but then I can't get 2 TB3 ports working on any of my Tiger Lake systems, either: only one device ever gets detected, no matter what combination of docks (TB4 capable), TB-NICs or TB-NVMe devices I use. The only dual TB3 combination that worked was actually TCP over TB networking, where I connected three NUCs with via the dual TB3 NUC11 in the middle. Unfortunately Intels TigerLake documentation seems intentionally vague as to how many PCIe lanes the U-type SoCs actually support: it was quite explicit on the earlier Gen8 and Gen10 chips...
And I wish they'd do away with those silly 2.5GBit ports already and instead put a Marvell/Aquantia NBase-T chip with up to 10Gbit/s in place, both for hardware and drivers that actually work and for a bandwidth that isn't as silly as port speeds even modern HDDs start to overwhelm. Actually 40Gbit would be a reasonable network speed for these µ-servers.
Wonder if they found a way to sneak in inline ECC support again...
Actually there are 32GB DDR4 SO-DIMMs with ECC available now, which really just charge for the extra chip! Even DDR5 is getting reasonable with ECC or not but not with ECC and SO-DIMM just yet (still 100% surcharge for one extra chip).
Too bad the SoCs don't seem to support normal ECC of any type, surcharge or not.
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abufrejoval - Sunday, February 12, 2023 - link
I love these little systems, but it's getting a bit crowded here...I'm still tied to Enterprise Linux 8 for RHV/oVirt, which might never properly support the mix of E/P cores and I haven't gotten around testing it with an Alder Lake notebook I recently bought. I would hope that with numactl some degree of manual control would be possible, if only to disable the E-cores and have the systems behave like better Tiger Lakes (or the reverse for better Jasper Lakes).
Lack of a 2nd Thunderbolt port is a bit disappointing, but then I can't get 2 TB3 ports working on any of my Tiger Lake systems, either: only one device ever gets detected, no matter what combination of docks (TB4 capable), TB-NICs or TB-NVMe devices I use. The only dual TB3 combination that worked was actually TCP over TB networking, where I connected three NUCs with via the dual TB3 NUC11 in the middle. Unfortunately Intels TigerLake documentation seems intentionally vague as to how many PCIe lanes the U-type SoCs actually support: it was quite explicit on the earlier Gen8 and Gen10 chips...
And I wish they'd do away with those silly 2.5GBit ports already and instead put a Marvell/Aquantia NBase-T chip with up to 10Gbit/s in place, both for hardware and drivers that actually work and for a bandwidth that isn't as silly as port speeds even modern HDDs start to overwhelm. Actually 40Gbit would be a reasonable network speed for these µ-servers.
Wonder if they found a way to sneak in inline ECC support again...
Actually there are 32GB DDR4 SO-DIMMs with ECC available now, which really just charge for the extra chip! Even DDR5 is getting reasonable with ECC or not but not with ECC and SO-DIMM just yet (still 100% surcharge for one extra chip).
Too bad the SoCs don't seem to support normal ECC of any type, surcharge or not.