Like me, I bet you lose your friends interest in the pub as you start to answer questions on what it is you really do... which leaves me thinking why'd you ask in the first place?
Yes it is very interesting, and really difficult to understand. I build the part of the machine that measures the position of the chuck and houses the big lens. I don't even understand all the other submodules haha. I normally just say i work as a mechanic at ASML, people stop asking further, they alreay know it's above their understanding :)
This announcement by ASML of volume shipment of their NXT:2000i DUV scanner is, at least to me, the most concrete evidence that we will indeed see significant shipments of several 7 nm chips by 2019 at least from TSMC, Samsung and GloFo. ASML's EUV scanner is quite something to behold and (theoretically) capable of 5 nm and even lower, but my understanding is that yield of 5 nm still leaves much to be desired (that's the fabs problem, not ASML's , their EUV scanner works). One big question we are all left to wonder is: Intel - what's happening, and what's keeping you?
I'm wondering if Intel will have it's 10nm ready for 2019 like they are now saying. It would be a massive blow if Intel had to delay into 2020 for any reason. I also wonder if going forward they will move away from their strategy of BIG monolithic node shrinks to something similar to what Samsung does with a yearly half node process improvement.
... What do you think Intel have been doing for the past few years? 14+, 14++ and 14+++ are exactly that, just without the "decrement the number and pretend it's a whole new process" schtick.
This isn't what Samsung has been doing. All of Intel's +++'s together only equal a half node process improvement and density actually decreased from OG 14nm to 14nm+. Samsung has been on a steady cadence of density increases one year and power performance improvement the next since they moved on from 28nm. Though each Samsung "tick tock" is smaller in size than Intel's major process shrinks. But then again Intel's been stuck on the same node for what will be 5 years.
For a quick look at what's actually been going on here a link.
Their first non monolithic chips are the new -AP series of Cascade Lake, its successor Cooper Lake and then (in 2H 2020) of Ice Lake. These will be their top-end, cutting edge CPUs, above even their current top-end SP series. They could employ any number and type of dies in them, from two 10-core dies for a 20-core package (which is cheaper than a 20-core -SP CPU with a monolithic die), to four 28-core dies for a.. 112-core package, maybe trimmed to 110 cores (with *severe* underclocking), or any other combination between these two extremes.
They will use EMIB to "glue" the dies, which is faster than AMD's Infinity Fabric and places all dies at the edge of each other, with no space between them. That trims the area of the package, but it also worsens the effects of high TDPs, since the "TDP density" (active heat per mm^2) is higher, while the neighbouring inactive dies are exposed to more heat by the active ones compared to AMD's Epyc. Currently Intel have no plans for multi-die packages for their consumer CPUs, not even for the HEDT ones (the -X series). At least they have announced none.
You can't compare EMIB to Infinity Fabric. One is physical, the other is a protocol. That protocol could run over an interposer or EMIB, and in doing so it could be made wider, faster and lower-power, as that is what those physical interfaces allow.
I suspect that there is some truth in the 10nm cancellation rumour, but that Intel have something lined up to replace it, maybe a bit later, that they will call 10nm. It's probably not as good in terms of density. If anything emerges in 2019 then it'll be the Y and U series IceLakes, but anything interesting will be 2020.
Intel has done minor tweaks to the 14nm process, sure, but they're not half-node shrinks. They're optimisations and tweaks for higher power usage in order to get higher clocks.
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15 Comments
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Incolumis - Thursday, August 2, 2018 - link
I'm proud to have worked on the machine👍🏻Notmyusualid - Thursday, August 2, 2018 - link
Lucky you, I bet it was (is?) fascinating work.Like me, I bet you lose your friends interest in the pub as you start to answer questions on what it is you really do... which leaves me thinking why'd you ask in the first place?
Incolumis - Friday, August 3, 2018 - link
Yes it is very interesting, and really difficult to understand. I build the part of the machine that measures the position of the chuck and houses the big lens. I don't even understand all the other submodules haha.I normally just say i work as a mechanic at ASML, people stop asking further, they alreay know it's above their understanding :)
justaviking - Thursday, August 2, 2018 - link
A dreadful lack of RGB LEDs.I'm not buying one.
BurntMyBacon - Tuesday, August 7, 2018 - link
Why would they need RGB LEDs to burn out your retinas? They have EUV lighting for that. (o_o)psychobriggsy - Tuesday, October 23, 2018 - link
Hah, let's not give Corsair any ideas here! They haven't even got DUV case LEDs yet :pFullmetalTitan - Thursday, August 2, 2018 - link
No final costs, but I am curious how much more that improved overlay budget costs. $5M? $50M?stanleyipkiss - Thursday, August 2, 2018 - link
Can I lease one? $300 monthly is best I can do.eastcoast_pete - Thursday, August 2, 2018 - link
This announcement by ASML of volume shipment of their NXT:2000i DUV scanner is, at least to me, the most concrete evidence that we will indeed see significant shipments of several 7 nm chips by 2019 at least from TSMC, Samsung and GloFo. ASML's EUV scanner is quite something to behold and (theoretically) capable of 5 nm and even lower, but my understanding is that yield of 5 nm still leaves much to be desired (that's the fabs problem, not ASML's , their EUV scanner works). One big question we are all left to wonder is: Intel - what's happening, and what's keeping you?SquarePeg - Friday, August 3, 2018 - link
I'm wondering if Intel will have it's 10nm ready for 2019 like they are now saying. It would be a massive blow if Intel had to delay into 2020 for any reason. I also wonder if going forward they will move away from their strategy of BIG monolithic node shrinks to something similar to what Samsung does with a yearly half node process improvement.edzieba - Friday, August 3, 2018 - link
... What do you think Intel have been doing for the past few years? 14+, 14++ and 14+++ are exactly that, just without the "decrement the number and pretend it's a whole new process" schtick.SquarePeg - Friday, August 3, 2018 - link
This isn't what Samsung has been doing. All of Intel's +++'s together only equal a half node process improvement and density actually decreased from OG 14nm to 14nm+. Samsung has been on a steady cadence of density increases one year and power performance improvement the next since they moved on from 28nm. Though each Samsung "tick tock" is smaller in size than Intel's major process shrinks. But then again Intel's been stuck on the same node for what will be 5 years.For a quick look at what's actually been going on here a link.
https://www.anandtech.com/show/12096/samsung-start...
Santoval - Monday, August 6, 2018 - link
Their first non monolithic chips are the new -AP series of Cascade Lake, its successor Cooper Lake and then (in 2H 2020) of Ice Lake. These will be their top-end, cutting edge CPUs, above even their current top-end SP series. They could employ any number and type of dies in them, from two 10-core dies for a 20-core package (which is cheaper than a 20-core -SP CPU with a monolithic die), to four 28-core dies for a.. 112-core package, maybe trimmed to 110 cores (with *severe* underclocking), or any other combination between these two extremes.They will use EMIB to "glue" the dies, which is faster than AMD's Infinity Fabric and places all dies at the edge of each other, with no space between them. That trims the area of the package, but it also worsens the effects of high TDPs, since the "TDP density" (active heat per mm^2) is higher, while the neighbouring inactive dies are exposed to more heat by the active ones compared to AMD's Epyc. Currently Intel have no plans for multi-die packages for their consumer CPUs, not even for the HEDT ones (the -X series). At least they have announced none.
psychobriggsy - Tuesday, October 23, 2018 - link
You can't compare EMIB to Infinity Fabric. One is physical, the other is a protocol. That protocol could run over an interposer or EMIB, and in doing so it could be made wider, faster and lower-power, as that is what those physical interfaces allow.psychobriggsy - Tuesday, October 23, 2018 - link
I suspect that there is some truth in the 10nm cancellation rumour, but that Intel have something lined up to replace it, maybe a bit later, that they will call 10nm. It's probably not as good in terms of density. If anything emerges in 2019 then it'll be the Y and U series IceLakes, but anything interesting will be 2020.Intel has done minor tweaks to the 14nm process, sure, but they're not half-node shrinks. They're optimisations and tweaks for higher power usage in order to get higher clocks.