I don't understand the change from Alder Lake/Raptor Lake to Meteror lake/Next Gen. Aren't they already separating the GPU die from the compute die? What's a TileGPU vs teh ARC Battlemage (GPU?)? This is as clear as mud.
I don't believe Intel previously officially confirmed whether or not the IGP on Meteor Lake would be its own tile. That's all this article is referring to: Intel is saying that graphics are their own tile. The current IGP and Alchemist core designs are a bit different from each other despite being the same architecture so it seems that everything will be unified with Meteor Lake.
what are you talking about? alder lake and raptor lake are monolithic, while meteor lake and later are chiplets. could not be more simple, they even have images where you can see the separation of chiplets if you have difficulty reading.
It doesn't show that in the least! The Alder Lake/Raptor Lake 'bar' shows a disjoint white ARC/Alchemist block and a separate blue die which is unlabled. Meteror Lake/Next Gen shows a white ARC/Battlemage block and a separate ARC (tile) GPU/SoC/CPU block (two GPU blocks). Next platform is similar, just changing the names on the white and grey blocks.
How does that make it clear that anything is monolithic or discrete?
The meteor lake graphic does show “tile” while the alder lake/Raptor lake graphic has no such definition. Meteor lake is tiled. Predecessor lakes are not.
it has them segmented off, with SoC down the middle and labeled as tile. it's also been known for years that meteor is tiled. you're confusing yourself by trying to redefine what you're reading instead of just looking at a simple image lol
By going tiles, the iGPU in Meteorlake can (and almost certainly will) be built on TSMC 3nm, while the cores (compute tile) and the rest of the CPU can use Intel 4. This disaggregated architecture can do what current designs can't - completely mix and match different node processes from different manufacturers.
The first step to this was the awful Rocket Lake CPUs, which while awful products, were useful for internal processes. The eventual end goal is an architecture that's so disaggregated, you can mix RISC-V or ARM with x86, etc.
Yes both AMD and Intel have the same final goal - Creating CPUs from tiles / chiplets as this creates a flexible and costefficient way of designung and manufacturing future SoCs. They took little different routes but the target is the same.
Same applies to GPUs and also Nvidia is looking into it and expected to offer by 2024 for their GPUs. Apple is rumored to do the same... By mid of this decade it should become the "new normal" to manufacture any kind of IP tile / chiplet and combine it with other IP tiles / chiplets to create a SoC.
The first step wasn't RocketLake as it had none of that and was just a simple monolithic CPU with that was backportet to 14nm... Basically we see two independant big steps at Intel:
- The first step was Lakefield try combining different tiles and node.
- The other step was trying big + little with AlderLake
MeteorLake now will shows their desired result combining both big changes in x86 CPU/APU design. It is basically the start of a new era!
In future we might see even more tiles such as specific ASICs, Cache, maybe even big and little cores separated... Once packaging and sheduling that is mature you can theoretically just build basic IP blocks / tiles and then create customized CPUs, APUs, GPUs according to customers needs without a new design by just combining those IP blocks / tiles and engineer the packaging around it. This could lead to fast time to market and cost savings!
Yeah rumors and leaks indicated for a long time that Intel uses TSMC N5 and N3 for the I/0 tile and iGPU tile while using their own 7nmESF aka Intel 4 for the CPU tile on MeteorLake... That comes to no surprise.
What I am surpised is that ArrowLake already offers GAAFETs as it was expected to be on Intel 3 / TSMC N3.
The TSMC N3 rumors didn't make sense. You need high volume manufacturing for processes to have a life, so if Intel didn't have any chips based on their own process, then they are effectively ceding the process race.
So some of their mainstream lineup with high volume had to be on Intel process. And that's a very good thing for Arrowlake and Intel. Intel, because they catch up on node, the Arrowlake since it'll turn out to be a better product.
There's no 7nm ESF. There was 10nmESF renamed to Intel 7. Intel 4 was Intel 7nm.
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dwillmore - Thursday, February 17, 2022 - link
I don't understand the change from Alder Lake/Raptor Lake to Meteror lake/Next Gen. Aren't they already separating the GPU die from the compute die? What's a TileGPU vs teh ARC Battlemage (GPU?)? This is as clear as mud.thestryker - Thursday, February 17, 2022 - link
I don't believe Intel previously officially confirmed whether or not the IGP on Meteor Lake would be its own tile. That's all this article is referring to: Intel is saying that graphics are their own tile. The current IGP and Alchemist core designs are a bit different from each other despite being the same architecture so it seems that everything will be unified with Meteor Lake.whatthe123 - Thursday, February 17, 2022 - link
what are you talking about? alder lake and raptor lake are monolithic, while meteor lake and later are chiplets. could not be more simple, they even have images where you can see the separation of chiplets if you have difficulty reading.dwillmore - Thursday, February 17, 2022 - link
It doesn't show that in the least! The Alder Lake/Raptor Lake 'bar' shows a disjoint white ARC/Alchemist block and a separate blue die which is unlabled. Meteror Lake/Next Gen shows a white ARC/Battlemage block and a separate ARC (tile) GPU/SoC/CPU block (two GPU blocks). Next platform is similar, just changing the names on the white and grey blocks.How does that make it clear that anything is monolithic or discrete?
Exotica - Thursday, February 17, 2022 - link
The meteor lake graphic does show “tile” while the alder lake/Raptor lake graphic has no such definition. Meteor lake is tiled. Predecessor lakes are not.dwillmore - Thursday, February 17, 2022 - link
It says "tile GPU" which is completely different than "GPU tile". Keep in mind that 'tile' already has a meaning within the GPU context.Exotica - Thursday, February 17, 2022 - link
Don’t outsmart yourself.whatthe123 - Thursday, February 17, 2022 - link
it has them segmented off, with SoC down the middle and labeled as tile. it's also been known for years that meteor is tiled. you're confusing yourself by trying to redefine what you're reading instead of just looking at a simple image loldwillmore - Friday, February 18, 2022 - link
So you agree the picture is confusing?whatthe123 - Friday, February 18, 2022 - link
no, how do you get that what I literally typed out "simple image" in my post? I'm starting to understand why you're so confused.dwillmore - Sunday, February 20, 2022 - link
At least you understand how poorly you write.kwohlt - Thursday, February 17, 2022 - link
By going tiles, the iGPU in Meteorlake can (and almost certainly will) be built on TSMC 3nm, while the cores (compute tile) and the rest of the CPU can use Intel 4. This disaggregated architecture can do what current designs can't - completely mix and match different node processes from different manufacturers.The first step to this was the awful Rocket Lake CPUs, which while awful products, were useful for internal processes. The eventual end goal is an architecture that's so disaggregated, you can mix RISC-V or ARM with x86, etc.
dwillmore - Thursday, February 17, 2022 - link
So it's like AMD's Zen products?drothgery - Thursday, February 17, 2022 - link
Same basic approach, some differences in the implementation details.Matthias B V - Friday, February 18, 2022 - link
Yes both AMD and Intel have the same final goal - Creating CPUs from tiles / chiplets as this creates a flexible and costefficient way of designung and manufacturing future SoCs. They took little different routes but the target is the same.Same applies to GPUs and also Nvidia is looking into it and expected to offer by 2024 for their GPUs. Apple is rumored to do the same... By mid of this decade it should become the "new normal" to manufacture any kind of IP tile / chiplet and combine it with other IP tiles / chiplets to create a SoC.
Oxford Guy - Friday, February 18, 2022 - link
Intel is refraining from using glue to put them together and will instead be applying mucilage.Matthias B V - Friday, February 18, 2022 - link
The first step wasn't RocketLake as it had none of that and was just a simple monolithic CPU with that was backportet to 14nm... Basically we see two independant big steps at Intel:- The first step was Lakefield try combining different tiles and node.
- The other step was trying big + little with AlderLake
MeteorLake now will shows their desired result combining both big changes in x86 CPU/APU design. It is basically the start of a new era!
In future we might see even more tiles such as specific ASICs, Cache, maybe even big and little cores separated... Once packaging and sheduling that is mature you can theoretically just build basic IP blocks / tiles and then create customized CPUs, APUs, GPUs according to customers needs without a new design by just combining those IP blocks / tiles and engineer the packaging around it. This could lead to fast time to market and cost savings!
Matthias B V - Friday, February 18, 2022 - link
Yeah rumors and leaks indicated for a long time that Intel uses TSMC N5 and N3 for the I/0 tile and iGPU tile while using their own 7nmESF aka Intel 4 for the CPU tile on MeteorLake... That comes to no surprise.What I am surpised is that ArrowLake already offers GAAFETs as it was expected to be on Intel 3 / TSMC N3.
IntelUser2000 - Sunday, February 20, 2022 - link
The TSMC N3 rumors didn't make sense. You need high volume manufacturing for processes to have a life, so if Intel didn't have any chips based on their own process, then they are effectively ceding the process race.So some of their mainstream lineup with high volume had to be on Intel process. And that's a very good thing for Arrowlake and Intel. Intel, because they catch up on node, the Arrowlake since it'll turn out to be a better product.
There's no 7nm ESF. There was 10nmESF renamed to Intel 7. Intel 4 was Intel 7nm.
IntelUser2000 - Sunday, February 20, 2022 - link
Early leaks indicated Meteorlake iGPU being based on DG2 Alchemist architecture.The slide is essentially showing now it'll use DG3 Battlemage architecture.