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  • TomWomack - Wednesday, August 21, 2024 - link

    That Marvell block diagram is positively misleading: if your job worked well on medium ARM cores you'd be using something from Ampere and wouldn't have as few as 96 of them, if it wants full-strength EPYC cores then adding 32 ARM cores doesn't get you much.

    I have real difficulty seeing how these CXL solutions will compete with just putting more bigger DDR5 modules in your servers; adding the PCIe hops kills the bandwidth and adds substantial latency, and weird low-production enterprise hardware with a 128GB capacity limit would seem to have real trouble competing with £276 per 64GB DDR5 module where most systems happily take sixteen per processor socket.
  • markhahn - Thursday, August 22, 2024 - link

    the whole point of CXL is to share resources between hosts. so you add a few TB of CXL memory to a rack of hosts, and avoid "stranding" memory on individual hosts. this probably makes more sense for GPUs than memory, since as you say, the latency cost is significant for memory.
  • BaronMatrix - Sunday, August 25, 2024 - link

    CXL is designed to make mobos not have to have 96 RAM slots... It also will allow for 2U racks with just RAM... There isn't much added latency so you can save space on those RAM slots...

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