Marketing, I guess. Uninformed or enterprise buyers will think they need Coffee Lake(tm) Approved(c) memory for their Coffee Lake(tm) systems, so they'll pay an arm and a leg extra over, general DDR4 memory (of the same capacity and roughly equivalent latency) without really knowing that it wasn't really necessary.
Well, zen isn't quite there in terms of MC maturity to support such speeds. So segmentation is kinda inevitable, at least with respect to maximum clocks. Ironically, it benefits significantly more from faster memory than intel.
Standards are for standard compliant speeds. Which is JEDEC speeds and timings (max DDR4-3200). Anything faster is out of spec, and the different platforms all have different fastest timings their memory controllers can be pushed to at the higher speeds. You could make a cross platform Dimm whose SPD settings work everywhere, but it would need to have the slowest value for each sub-timing to work everywhere. Doing one per platform lets them push each to its individual limit. As mentioned in the article this batch is coming out because for whatever reason Coffee lake is requiring marginally less aggressive timings than Kaby lake did for stability. Why is an open question, and will probably remain so unless an insider at Intel, the mobo makers, or the dram makers spills the beans.
Why even bother making this high speed chips for coffe lake when they performance gains are minimal vs the huge gains of Ryzen with high speed low latency memory (DDR4 3466 CL14 giving 10-20% extra performance over the already fast for Ryzen DDR4 3200 CL14)
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eek2121 - Wednesday, October 18, 2017 - link
Why do memory manufacturers feel the need to segment their products to a specific platform? Isn't that what standards are for?JoeyJoJo123 - Wednesday, October 18, 2017 - link
Marketing, I guess. Uninformed or enterprise buyers will think they need Coffee Lake(tm) Approved(c) memory for their Coffee Lake(tm) systems, so they'll pay an arm and a leg extra over, general DDR4 memory (of the same capacity and roughly equivalent latency) without really knowing that it wasn't really necessary.ddriver - Wednesday, October 18, 2017 - link
Well, zen isn't quite there in terms of MC maturity to support such speeds. So segmentation is kinda inevitable, at least with respect to maximum clocks. Ironically, it benefits significantly more from faster memory than intel.Lolimaster - Wednesday, October 18, 2017 - link
Ryzen benefitis more from the lowest latency you can get.3466 CL14 >>>>>>>>>> 3600 CL16
Lolimaster - Wednesday, October 18, 2017 - link
When you combined both, Ryzen performance scales like a monster.DanNeely - Wednesday, October 18, 2017 - link
Standards are for standard compliant speeds. Which is JEDEC speeds and timings (max DDR4-3200). Anything faster is out of spec, and the different platforms all have different fastest timings their memory controllers can be pushed to at the higher speeds. You could make a cross platform Dimm whose SPD settings work everywhere, but it would need to have the slowest value for each sub-timing to work everywhere. Doing one per platform lets them push each to its individual limit. As mentioned in the article this batch is coming out because for whatever reason Coffee lake is requiring marginally less aggressive timings than Kaby lake did for stability. Why is an open question, and will probably remain so unless an insider at Intel, the mobo makers, or the dram makers spills the beans.Lolimaster - Wednesday, October 18, 2017 - link
Why even bother making this high speed chips for coffe lake when they performance gains are minimal vs the huge gains of Ryzen with high speed low latency memory (DDR4 3466 CL14 giving 10-20% extra performance over the already fast for Ryzen DDR4 3200 CL14)