It hasn't been much of a secret in the SoC space that big.LITTLE on the original Exynos 5 Octa (5410) didn't end up working in the most optimal fashion. Instead of using core migration or the Heterogeneous Multi-Processing (HMP) big.LITTLE models, the 5410 instead used cluster migration which meant either all 4 ARM Cortex A15s or 4 ARM Cortex A7s were lit up.

For those not familiar, there are three big.LITTLE models, core switching, in which any of the A7 and A15 cores can be swapped, cluster switching, in which either all A7s or all A15s can be swapped, or HMP, where the kernel is aware of all cores and can schedule threads to any of the cores all at once. This final model is coming to Exynos 5420 by the end of Q4 2013 and will be available to partners shipping product based on its reference platform.

ARM gave us a chance to take a look at the HMP enabled Exynos 5420 reference platform running through a few demos, showing the kernel swapping in and out A7s and A15 cores as system workload changed. I got to see these in person but ARM has also posted them on YouTube in quality better than I could've captured. 

Exynos 5420 also includes the necessary fixes to the cache coherency interface (CCI-400) that enable it to work this time between the A7s, A15s, and Mali T-628, versus 5410 which didn't enable it and thus suffered loss of efficiency. This makes 5420 the first real platform to take a look at the full promise of ARM's big.LITTLE model. 

Source: Samsung